We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 159dd44 commit 2e0ee68Copy full SHA for 2e0ee68
llvm/docs/LangRef.rst
@@ -17575,7 +17575,7 @@ Examples:
17575
;; For all lanes below %evl, %r is lane-wise equivalent to %also.r
17576
17577
%t = sdiv <4 x i32> %a, %b
17578
- %also.r = select <4 x ii> %mask, <4 x i32> %t, <4 x i32> undef
+ %also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> undef
17579
17580
17581
.. _int_vp_udiv:
@@ -17620,7 +17620,7 @@ Examples:
17620
17621
17622
%t = udiv <4 x i32> %a, %b
17623
17624
17625
17626
0 commit comments