@@ -46722,14 +46722,14 @@ static SDValue combineSelect(SDNode *N, SelectionDAG &DAG,
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return DAG.getNode(N->getOpcode(), DL, VT,
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DAG.getBitcast(CondVT, CondNot), RHS, LHS);
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- if (Cond.getOpcode() == X86ISD::PCMPGT && Cond.hasOneUse()) {
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- // pcmpgt(X, -1) -> pcmpgt(0, X) to help select/blendv just use the
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- // signbit.
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- if ( ISD::isBuildVectorAllOnes(Cond.getOperand(1).getNode())) {
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- Cond = DAG.getNode(X86ISD::PCMPGT, DL, CondVT,
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- DAG.getConstant(0 , DL, CondVT), Cond.getOperand(0));
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- return DAG.getNode(N->getOpcode() , DL, VT , Cond, RHS, LHS );
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- }
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+ // pcmpgt(X, -1) -> pcmpgt(0, X) to help select/blendv just use the
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+ // signbit.
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+ if (Cond.getOpcode() == X86ISD::PCMPGT &&
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+ ISD::isBuildVectorAllOnes(Cond.getOperand(1).getNode()) &&
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+ Cond.hasOneUse()) {
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+ Cond = DAG.getNode(X86ISD::PCMPGT , DL, CondVT,
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+ DAG.getConstant(0 , DL, CondVT) , Cond.getOperand(0) );
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+ return DAG.getNode(N->getOpcode(), DL, VT, Cond, RHS, LHS);
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}
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}
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@@ -49544,12 +49544,12 @@ static SDValue combineAndMaskToShift(SDNode *N, SelectionDAG &DAG,
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if (N->getValueType(0) == VT &&
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supportedVectorShiftWithImm(VT.getSimpleVT(), Subtarget, ISD::SRA)) {
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SDValue X, Y;
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- if (Op1.hasOneUse() && Op1. getOpcode() == X86ISD::PCMPGT &&
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- isAllOnesOrAllOnesSplat(Op1.getOperand(1))) {
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+ if (Op1.getOpcode() == X86ISD::PCMPGT &&
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+ isAllOnesOrAllOnesSplat(Op1.getOperand(1)) && Op1.hasOneUse() ) {
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X = Op1.getOperand(0);
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Y = Op0;
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- } else if (Op0.hasOneUse() && Op0. getOpcode() == X86ISD::PCMPGT &&
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- isAllOnesOrAllOnesSplat(Op0.getOperand(1))) {
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+ } else if (Op0.getOpcode() == X86ISD::PCMPGT &&
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+ isAllOnesOrAllOnesSplat(Op0.getOperand(1)) && Op0.hasOneUse() ) {
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X = Op0.getOperand(0);
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Y = Op1;
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}
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