[OpaquePointers] XFAIL annotation_dbg_info_drop.ll (#2083)

It should be compiltely rewritten

Signed-off-by: Sidorov, Dmitry <[email protected]>

Author: MrSidims

test/transcoding/annotation_dbg_info_drop.ll

@@ -1,15 +1,19 @@
-; RUN: llvm-as -opaque-pointers=0 %s -o %t.bc
-; RUN: llvm-spirv %t.bc -opaque-pointers=0 -o %t.spv
+; RUN: llvm-as %s -o %t.bc
+; RUN: llvm-spirv %t.bc -o %t.spv
 ; RUN: llvm-spirv %t.spv --to-text -o %t.spt
 ; RUN: FileCheck < %t.spt %s --check-prefixes=CHECK,CHECK-SPV
 
-; RUN: llvm-spirv %t.bc -opaque-pointers=0 --spirv-ext=+SPV_INTEL_fpga_reg -o %t.fpga_reg.spv
+; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_fpga_reg -o %t.fpga_reg.spv
 ; RUN: llvm-spirv %t.fpga_reg.spv --to-text -o %t.fpga_reg.spt
 ; RUN: FileCheck < %t.fpga_reg.spt %s --check-prefixes=CHECK,CHECK-SPV-FPGA_REG
 
+; need to rewrite the entire test since with opaque pointers a lot of bitcasts
+; are being eliminated, and those bitcasts were carrying debug information
+; XFAIL: *
+
 ; -- Check that reverse translation is not failed.
-; RUN: llvm-spirv -r -emit-opaque-pointers %t.spv -o %t.rev.bc
-; RUN: llvm-spirv -r -emit-opaque-pointers %t.fpga_reg.spv -o %t.rev.fpga_reg.bc
+; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
+; RUN: llvm-spirv -r %t.fpga_reg.spv -o %t.rev.fpga_reg.bc
 
 ; ModuleID = 'annotation_dbg_info_drop.cpp'
 source_filename = "annotation_dbg_info_drop.cpp"
@@ -60,10 +64,9 @@ entry:
   call void @llvm.lifetime.start.p0i8(i64 1, i8* %0) #5, !dbg !72
   call void @llvm.dbg.declare(metadata [1 x i8]* %Buf, metadata !52, metadata !DIExpression()), !dbg !73
   %Buf2 = bitcast [1 x i8]* %Buf to i8*, !dbg !72
-  call void @llvm.var.annotation(i8* %Buf2, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i32 0, i32 0), i32 15, i8* null), !dbg !72
+  call void @llvm.var.annotation(i8* %Buf2, i8* bitcast ([25 x i8]* @.str to i8*), i8* bitcast ([29 x i8]* @.str.1 to i8*), i32 15, i8* null), !dbg !72
 ; CHECK:      {{[0-9]+}} ExtInst {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} DebugNoScope
-; CHECK-NEXT: {{[0-9]+}} InBoundsPtrAccessChain {{[0-9]+}} {{[0-9]+}} [[ANNO_PUMP_ID]]
-; CHECK-NEXT: {{[0-9]+}} InBoundsPtrAccessChain {{[0-9]+}} {{[0-9]+}} [[FILE_ID]]
+; CHECK-NEXT: Load
   call spir_func void @_Z1fv(), !dbg !74
 ; -- var.annotation call is dropped. Restore debug scope after the call.
 ; CHECK-NEXT: {{[0-9]+}} ExtInst {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} DebugScope
@@ -77,9 +80,9 @@ entry:
   call void @llvm.lifetime.start.p0i8(i64 4, i8* %2) #5, !dbg !79
   call void @llvm.dbg.declare(metadata i32* %b, metadata !54, metadata !DIExpression()), !dbg !80
   %3 = load i32, i32* %a, align 4, !dbg !81, !tbaa !77
-  %4 = call i32 @llvm.annotation.i32(i32 %3, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i32 0, i32 0), i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i32 0, i32 0), i32 18), !dbg !82
+  %4 = call i32 @llvm.annotation.i32(i32 %3, i8* bitcast ([25 x i8]* @.str.2 to i8*), i8* bitcast ([29 x i8]* @.str.1 to i8*), i32 18), !dbg !82
 ; CHECK:      {{[0-9]+}} ExtInst {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} DebugNoScope
-; CHECK-NEXT: {{[0-9]+}} InBoundsPtrAccessChain {{[0-9]+}} {{[0-9]+}} [[FPGA_REG_ID]]
+; CHECK-NEXT: {{[0-9]+}} Bitcast {{[0-9]+}} {{[0-9]+}} [[FPGA_REG_ID]]
   store i32 %4, i32* %b, align 4, !dbg !80, !tbaa !77
 ; -- Restore debug scope after the call in both cases with or without SPV_INTEL_fpga_reg extension.
 ; CHECK-NEXT: {{[0-9]+}} ExtInst {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} DebugScope
@@ -95,7 +98,7 @@ entry:
 ; -- annotation call is dropped. No debug scope or line change for first argument declaration.
 ; CHECK-NEXT:     {{[0-9]+}} Load
 ; CHECK-NEXT:     {{[0-9]+}} Line
-  %8 = call i64 @llvm.annotation.i64(i64 %7, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i32 0, i32 0), i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i32 0, i32 0), i32 19), !dbg !86
+  %8 = call i64 @llvm.annotation.i64(i64 %7, i8* bitcast ([25 x i8]* @.str.2 to i8*), i8* bitcast ([29 x i8]* @.str.1 to i8*), i32 19), !dbg !86
 ; CHECK-SPV-FPGA_REG-NEXT: {{[0-9]+}} FPGARegINTEL
   store i64 %8, i64* %c, align 8, !dbg !84, !tbaa !39
 ; CHECK-SPV-NEXT: {{[0-9]+}} Store
@@ -104,9 +107,9 @@ entry:
   call void @llvm.dbg.declare(metadata %"struct._ZTSZZZ4mainENK3$_0clERN2cl4sycl7handlerEENKUlvE_clEvE3s_d.s_d"* %d, metadata !56, metadata !DIExpression()), !dbg !88
   %mem = getelementptr inbounds %"struct._ZTSZZZ4mainENK3$_0clERN2cl4sycl7handlerEENKUlvE_clEvE3s_d.s_d", %"struct._ZTSZZZ4mainENK3$_0clERN2cl4sycl7handlerEENKUlvE_clEvE3s_d.s_d"* %d, i32 0, i32 0, !dbg !89
   %10 = bitcast [8 x i32]* %mem to i8*, !dbg !89
-  %11 = call i8* @llvm.ptr.annotation.p0i8(i8* %10, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.3, i32 0, i32 0), i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i32 0, i32 0), i32 21, i8* null), !dbg !89
+  %11 = call i8* @llvm.ptr.annotation.p0i8(i8* %10, i8* bitcast ([29 x i8]* @.str.3 to i8*), i8* bitcast ([29 x i8]* @.str.1 to i8*), i32 21, i8* null), !dbg !89
 ; CHECK:      {{[0-9]+}} ExtInst {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} DebugNoScope
-; CHECK-NEXT: {{[0-9]+}} InBoundsPtrAccessChain {{[0-9]+}} {{[0-9]+}} [[ANNO_NUMBANKS_ID]]
+; CHECK-NEXT: {{[0-9]+}} Bitcast {{[0-9]+}} {{[0-9]+}} [[ANNO_NUMBANKS_ID]]
   %12 = bitcast i8* %11 to [8 x i32]*, !dbg !89
 ; -- annotation call is dropped. Restore debug scope
 ; CHECK-NEXT: {{[0-9]+}} ExtInst {{[0-9]+}} {{[0-9]+}} {{[0-9]+}} DebugScope
@@ -125,7 +128,7 @@ entry:
   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %15, i8* align 4 %16, i64 16, i1 false), !dbg !96, !tbaa.struct !97
   %17 = bitcast %"struct._ZTSZZZ4mainENK3$_0clERN2cl4sycl7handlerEENKUlvE_clEvE3s_e.s_e"* %agg-temp to i8*, !dbg !99
 ; CHECK:      {{[0-9]+}} Bitcast {{[0-9]+}} {{[0-9]+}} [[AGG_TMP_ID]]
-  %18 = call i8* @llvm.ptr.annotation.p0i8(i8* %17, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i32 0, i32 0), i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i32 0, i32 0), i32 27, i8* null), !dbg !99
+  %18 = call i8* @llvm.ptr.annotation.p0i8(i8* %17, i8* bitcast ([25 x i8]* @.str.2 to i8*), i8* bitcast ([29 x i8]* @.str.1 to i8*), i32 27, i8* null), !dbg !99
 ; -- No change of debug scope after the call in both cases with or without SPV_INTEL_fpga_reg extension.
 ; CHECK-SPV-FPGA_REG-NEXT: {{[0-9]+}} FPGARegINTEL
   %19 = bitcast i8* %18 to %"struct._ZTSZZZ4mainENK3$_0clERN2cl4sycl7handlerEENKUlvE_clEvE3s_e.s_e"*, !dbg !99