Update SPV_INTEL_vector_compute to rev 15

This adds NamedBarrierCountINTEL Execution Mode,
see more in intel/llvm#1612

Co-authored-by: nrudenko <[email protected]>

Author: vmustya

lib/SPIRV/PreprocessMetadata.cpp

@@ -348,6 +348,18 @@ void PreprocessMetadataBase::preprocessVectorComputeMetadata(Module *M,
           .add(spv::internal::ExecutionModeFastCompositeKernelINTEL)
           .done();
     }
+
+    if (Attrs.hasFnAttr(kVCMetadata::VCNamedBarrierCount)) {
+      SPIRVWord NBarrierCnt = 0;
+      Attrs.getFnAttr(kVCMetadata::VCNamedBarrierCount)
+          .getValueAsString()
+          .getAsInteger(0, NBarrierCnt);
+      EM.addOp()
+          .add(&F)
+          .add(spv::internal::ExecutionModeNamedBarrierCountINTEL)
+          .add(NBarrierCnt)
+          .done();
+    }
   }
 }
 

lib/SPIRV/SPIRVReader.cpp

@@ -4215,6 +4215,14 @@ bool SPIRVToLLVM::transVectorComputeMetadata(SPIRVFunction *BF) {
     F->addFnAttr(Attr);
   }
 
+  if (auto *EM =
+          BF->getExecutionMode(internal::ExecutionModeNamedBarrierCountINTEL)) {
+    unsigned int NBarrierCnt = EM->getLiterals()[0];
+    Attribute Attr = Attribute::get(*Context, kVCMetadata::VCNamedBarrierCount,
+                                    std::to_string(NBarrierCnt));
+    F->addFnAttr(Attr);
+  }
+
   return true;
 }
 

lib/SPIRV/SPIRVWriter.cpp

@@ -4560,6 +4560,16 @@ bool LLVMToSPIRVBase::transExecutionMode() {
           break;
         AddSingleArgExecutionMode(static_cast<ExecutionMode>(EMode));
       } break;
+      case spv::internal::ExecutionModeNamedBarrierCountINTEL: {
+        if (!BM->isAllowedToUseExtension(ExtensionID::SPV_INTEL_vector_compute))
+          break;
+        unsigned NBarrierCnt = 0;
+        N.get(NBarrierCnt);
+        BF->addExecutionMode(new SPIRVExecutionMode(
+            BF, static_cast<ExecutionMode>(EMode), NBarrierCnt));
+        BM->addExtension(ExtensionID::SPV_INTEL_vector_compute);
+        BM->addCapability(CapabilityVectorComputeINTEL);
+      } break;
 
       case spv::ExecutionModeDenormPreserve:
       case spv::ExecutionModeDenormFlushToZero:

lib/SPIRV/VectorComputeUtil.h

@@ -112,6 +112,7 @@ const static char VCCallable[] = "VCCallable";
 const static char VCSingleElementVector[] = "VCSingleElementVector";
 const static char VCFCEntry[] = "VCFCEntry";
 const static char VCMediaBlockIO[] = "VCMediaBlockIO";
+const static char VCNamedBarrierCount[] = "VCNamedBarrierCount";
 } // namespace kVCMetadata
 
 namespace kVCType {

lib/SPIRV/libSPIRV/SPIRVEntry.cpp

@@ -582,6 +582,7 @@ void SPIRVExecutionMode::decode(std::istream &I) {
   case ExecutionModeFloatingPointModeALTINTEL:
   case ExecutionModeFloatingPointModeIEEEINTEL:
   case ExecutionModeSharedLocalMemorySizeINTEL:
+  case internal::ExecutionModeNamedBarrierCountINTEL:
   case ExecutionModeSubgroupSize:
   case ExecutionModeMaxWorkDimINTEL:
   case ExecutionModeNumSIMDWorkitemsINTEL:

lib/SPIRV/libSPIRV/SPIRVEnum.h

@@ -263,6 +263,8 @@ template <> inline void SPIRVMap<SPIRVExecutionModeKind, SPIRVCapVec>::init() {
                {internal::CapabilityFastCompositeINTEL});
   ADD_VEC_INIT(internal::ExecutionModeStreamingInterfaceINTEL,
                {CapabilityFPGAKernelAttributesINTEL});
+  ADD_VEC_INIT(internal::ExecutionModeNamedBarrierCountINTEL,
+               {CapabilityVectorComputeINTEL});
 }
 
 template <> inline void SPIRVMap<SPIRVMemoryModelKind, SPIRVCapVec>::init() {

lib/SPIRV/libSPIRV/spirv_internal.hpp

@@ -83,7 +83,8 @@ enum InternalFunctionControlMask { IFunctionControlOptNoneINTELMask = 0x10000 };
 
 enum InternalExecutionMode {
   IExecModeFastCompositeKernelINTEL = 6088,
-  IExecModeStreamingInterfaceINTEL = 6154
+  IExecModeStreamingInterfaceINTEL = 6154,
+  IExecModeNamedBarrierCountINTEL = 6417
 };
 
 enum InternalLoopControlMask { ILoopControlLoopCountINTELMask = 0x1000000 };
@@ -178,6 +179,9 @@ constexpr ExecutionMode ExecutionModeFastCompositeKernelINTEL =
 constexpr ExecutionMode ExecutionModeStreamingInterfaceINTEL =
     static_cast<ExecutionMode>(IExecModeStreamingInterfaceINTEL);
 
+constexpr ExecutionMode ExecutionModeNamedBarrierCountINTEL =
+    static_cast<ExecutionMode>(IExecModeNamedBarrierCountINTEL);
+
 static const LoopControlMask LoopControlLoopCountINTELMask =
     static_cast<LoopControlMask>(ILoopControlLoopCountINTELMask);
 

test/transcoding/SPV_INTEL_vector_compute/exec_mode_named_barriers_count.ll

@@ -0,0 +1,32 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: llvm-spirv %t.bc -o %t.spv --spirv-ext=+SPV_INTEL_vector_compute
+; RUN: llvm-spirv %t.spv -o %t.spt --to-text
+; RUN: llvm-spirv -r -emit-opaque-pointers %t.spv -o %t.bc
+; RUN: llvm-dis %t.bc -o %t.ll
+; RUN: FileCheck %s --input-file %t.spt -check-prefix=SPV
+; RUN: FileCheck %s --input-file %t.ll  -check-prefix=LLVM
+
+; ModuleID = 'slm.bc'
+source_filename = "slm.cpp"
+target datalayout = "e-p:64:64-i64:64-n8:16:32"
+target triple = "spir"
+
+; LLVM-DAG: @k_rte{{[^a-zA-Z0-9_][^#]*}}#[[K_RTE:[0-9]+]]
+; LLVM-DAG: attributes #[[K_RTE]]{{[^0-9].*"VCNamedBarrierCount"="8"}}
+; SPV-DAG: Extension "SPV_INTEL_vector_compute"
+; SPV-DAG: Capability VectorComputeINTEL
+; SPV: EntryPoint {{[0-9]+}} [[S_RTE:[0-9]+]] "k_rte"
+; SPV: ExecutionMode [[S_RTE]] 6417 8
+; Function Attrs: noinline norecurse nounwind readnone
+define dso_local dllexport spir_kernel void @k_rte(i32 %ibuf, i32 %obuf) local_unnamed_addr #1 {
+entry:
+  ret void
+}
+
+attributes #1 = { noinline norecurse nounwind readnone "VCMain" "VCFunction" "VCNamedBarrierCount"="8" "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+
+!llvm.module.flags = !{!0}
+!llvm.ident = !{!1}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
+!1 = !{!"clang version 8.0.1"}