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KornevNikitaKornevNikita
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Support sycl_ext_oneapi_prefetch (#2189)
SYCL part: intel/llvm#11458 intel/llvm#11597 Handle new properties and decorate prefetch's arg.
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+118
-5
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‎lib/SPIRV/SPIRVWriter.cpp

Lines changed: 29 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2892,10 +2892,12 @@ struct AnnotationDecorations {
28922892
DecorationsInfoVec MemoryAccessesVec;
28932893
DecorationsInfoVec BufferLocationVec;
28942894
DecorationsInfoVec LatencyControlVec;
2895+
DecorationsInfoVec CacheControlVec;
28952896

28962897
bool empty() {
28972898
return (MemoryAttributesVec.empty() && MemoryAccessesVec.empty() &&
2898-
BufferLocationVec.empty() && LatencyControlVec.empty());
2899+
BufferLocationVec.empty() && LatencyControlVec.empty() &&
2900+
CacheControlVec.empty());
28992901
}
29002902
};
29012903

@@ -3090,6 +3092,8 @@ AnnotationDecorations tryParseAnnotationString(SPIRVModule *BM,
30903092
BM->isAllowedToUseExtension(ExtensionID::SPV_INTEL_fpga_buffer_location);
30913093
const bool AllowFPGALatencyControl =
30923094
BM->isAllowedToUseExtension(ExtensionID::SPV_INTEL_fpga_latency_control);
3095+
const bool AllowCacheControls =
3096+
BM->isAllowedToUseExtension(ExtensionID::SPV_INTEL_cache_controls);
30933097

30943098
bool ValidDecorationFound = false;
30953099
DecorationsInfoVec DecorationsVec;
@@ -3119,6 +3123,11 @@ AnnotationDecorations tryParseAnnotationString(SPIRVModule *BM,
31193123
DecorationLatencyControlConstraintINTEL)) {
31203124
Decorates.LatencyControlVec.emplace_back(
31213125
static_cast<Decoration>(DecorationKind), std::move(DecValues));
3126+
} else if (AllowCacheControls &&
3127+
DecorationKind ==
3128+
internal::DecorationCacheControlLoadINTEL) {
3129+
Decorates.CacheControlVec.emplace_back(
3130+
static_cast<Decoration>(DecorationKind), std::move(DecValues));
31223131
} else {
31233132
DecorationsVec.emplace_back(static_cast<Decoration>(DecorationKind),
31243133
std::move(DecValues));
@@ -3228,7 +3237,7 @@ void addAnnotationDecorations(SPIRVEntry *E, DecorationsInfoVec &Decorations) {
32283237
if (I.first != DecorationUserSemantic)
32293238
continue;
32303239

3231-
switch (I.first) {
3240+
switch (static_cast<size_t>(I.first)) {
32323241
case DecorationUserSemantic:
32333242
M->getErrorLog().checkError(I.second.size() == 1,
32343243
SPIRVEC_InvalidLlvmModule,
@@ -3349,6 +3358,21 @@ void addAnnotationDecorations(SPIRVEntry *E, DecorationsInfoVec &Decorations) {
33493358
}
33503359
break;
33513360
}
3361+
case spv::internal::DecorationCacheControlLoadINTEL: {
3362+
if (M->isAllowedToUseExtension(ExtensionID::SPV_INTEL_cache_controls)) {
3363+
M->getErrorLog().checkError(
3364+
I.second.size() == 2, SPIRVEC_InvalidLlvmModule,
3365+
"CacheControlLoadINTEL requires exactly 2 extra operands");
3366+
SPIRVWord CacheLevel = 0;
3367+
SPIRVWord CacheControl = 0;
3368+
StringRef(I.second[0]).getAsInteger(10, CacheLevel);
3369+
StringRef(I.second[1]).getAsInteger(10, CacheControl);
3370+
E->addDecorate(new SPIRVDecorateCacheControlLoadINTEL(
3371+
E, CacheLevel,
3372+
static_cast<internal::LoadCacheControlINTEL>(CacheControl)));
3373+
}
3374+
}
3375+
33523376
default:
33533377
// Other decorations are either not supported by the translator or
33543378
// handled in other places.
@@ -4179,9 +4203,7 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
41794203
} else {
41804204
// Memory accesses to a standalone pointer variable
41814205
auto *DecSubj = transValue(II->getArgOperand(0), BB);
4182-
if (Decorations.MemoryAccessesVec.empty() &&
4183-
Decorations.BufferLocationVec.empty() &&
4184-
Decorations.LatencyControlVec.empty())
4206+
if (Decorations.empty())
41854207
DecSubj->addDecorate(new SPIRVDecorateUserSemanticAttr(
41864208
DecSubj, AnnotationString.c_str()));
41874209
else {
@@ -4194,6 +4216,8 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
41944216
addAnnotationDecorations(DecSubj, Decorations.BufferLocationVec);
41954217
addAnnotationDecorations(DecSubj, Decorations.LatencyControlVec);
41964218
}
4219+
4220+
addAnnotationDecorations(DecSubj, Decorations.CacheControlVec);
41974221
}
41984222
II->replaceAllUsesWith(II->getOperand(0));
41994223
}

‎test/extensions/INTEL/SPV_INTEL_cache_controls/decorate-prefetch-w-cache-controls.ll

Lines changed: 89 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,89 @@
1+
; RUN: llvm-as %s -o %t.bc
2+
; RUN: llvm-spirv --spirv-ext=+SPV_INTEL_cache_controls -spirv-text %t.bc -o - | FileCheck %s --check-prefix=CHECK-SPIRV
3+
4+
; RUN: llvm-spirv --spirv-ext=+SPV_INTEL_cache_controls %t.bc -o %t.spv
5+
; RUN: llvm-spirv -r %t.spv --spirv-target-env=SPV-IR -o - | llvm-dis -o - | FileCheck %s --check-prefix=CHECK-LLVM
6+
7+
target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
8+
target triple = "spir64-unknown-unknown"
9+
10+
$_ZTSZ4mainEUlvE_ = comdat any
11+
12+
; https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_cache_controls.asciidoc
13+
; These strings are:
14+
; {CacheControlLoadINTEL_Token:\22CacheLevel,CacheControl\22}
15+
@.str.1 = private unnamed_addr addrspace(1) constant [16 x i8] c"../prefetch.hpp\00", section "llvm.metadata"
16+
@.str.9 = private unnamed_addr addrspace(1) constant [13 x i8] c"{6442:\220,1\22}\00", section "llvm.metadata"
17+
@.str.10 = private unnamed_addr addrspace(1) constant [13 x i8] c"{6442:\221,1\22}\00", section "llvm.metadata"
18+
@.str.11 = private unnamed_addr addrspace(1) constant [13 x i8] c"{6442:\222,3\22}\00", section "llvm.metadata"
19+
20+
; these CHECK-SPIRV check that prefetch's arg is decorated with the appropriate
21+
; CacheLevel and CacheControl values.
22+
23+
; CHECK-SPIRV: Decorate [[PTR_ID1:.*]] CacheControlLoadINTEL 0 1
24+
; CHECK-SPIRV: Decorate [[PTR_ID2:.*]] CacheControlLoadINTEL 1 1
25+
; CHECK-SPIRV: Decorate [[PTR_ID3:.*]] CacheControlLoadINTEL 2 3
26+
27+
; CHECK-SPIRV: ExtInst [[#]] [[#]] [[#]] prefetch [[PTR_ID1]] [[#]]
28+
; CHECK-SPIRV: ExtInst [[#]] [[#]] [[#]] prefetch [[PTR_ID2]] [[#]]
29+
; CHECK-SPIRV: ExtInst [[#]] [[#]] [[#]] prefetch [[PTR_ID3]] [[#]]
30+
31+
; Check that the appropriate !spirv.Decorations are preserved after reverse
32+
; translation
33+
34+
; CHECK-LLVM: %[[CALL1:.*]] = call spir_func ptr addrspace(1) @_Z41__spirv_GenericCastToPtrExplicit_ToGlobal{{.*}} !spirv.Decorations ![[MD1:.*]]
35+
; CHECK-LLVM: call spir_func void @_Z20__spirv_ocl_prefetch{{.*}}(ptr addrspace(1) %[[CALL1]], i64 1)
36+
; CHECK-LLVM: %[[CALL2:.*]] = call spir_func ptr addrspace(1) @_Z41__spirv_GenericCastToPtrExplicit_ToGlobal{{.*}} !spirv.Decorations ![[MD2:.*]]
37+
; CHECK-LLVM: call spir_func void @_Z20__spirv_ocl_prefetch{{.*}}(ptr addrspace(1) %[[CALL2]], i64 1)
38+
; CHECK-LLVM: %[[CALL3:.*]] = call spir_func ptr addrspace(1) @_Z41__spirv_GenericCastToPtrExplicit_ToGlobal{{.*}} !spirv.Decorations ![[MD3:.*]]
39+
; CHECK-LLVM: call spir_func void @_Z20__spirv_ocl_prefetch{{.*}}(ptr addrspace(1) %[[CALL3]], i64 2)
40+
41+
42+
; Function Attrs: convergent norecurse nounwind
43+
define weak_odr dso_local spir_kernel void @_ZTSZ4mainEUlvE_(ptr addrspace(1) noundef align 1 %_arg_dataPtr) local_unnamed_addr comdat !srcloc !5 !kernel_arg_buffer_location !6 !sycl_fixed_targets !7 !sycl_kernel_omit_args !8 {
44+
entry:
45+
%0 = addrspacecast ptr addrspace(1) %_arg_dataPtr to ptr addrspace(4)
46+
%call.i.i.i.i = tail call spir_func noundef ptr addrspace(1) @_Z41__spirv_GenericCastToPtrExplicit_ToGlobalPvi(ptr addrspace(4) noundef %0, i32 noundef 5)
47+
%1 = tail call ptr addrspace(1) @llvm.ptr.annotation.p1.p1(ptr addrspace(1) %call.i.i.i.i, ptr addrspace(1) @.str.9, ptr addrspace(1) @.str.1, i32 76, ptr addrspace(1) null)
48+
tail call spir_func void @_Z20__spirv_ocl_prefetchPU3AS1Kcm(ptr addrspace(1) noundef %1, i64 noundef 1)
49+
%arrayidx3.i = getelementptr inbounds i8, ptr addrspace(4) %0, i64 1
50+
%call.i.i.i13.i = tail call spir_func noundef ptr addrspace(1) @_Z41__spirv_GenericCastToPtrExplicit_ToGlobalPvi(ptr addrspace(4) noundef %arrayidx3.i, i32 noundef 5)
51+
%2 = tail call ptr addrspace(1) @llvm.ptr.annotation.p1.p1(ptr addrspace(1) %call.i.i.i13.i, ptr addrspace(1) @.str.10, ptr addrspace(1) @.str.1, i32 80, ptr addrspace(1) null)
52+
tail call spir_func void @_Z20__spirv_ocl_prefetchPU3AS1Kcm(ptr addrspace(1) noundef %2, i64 noundef 1)
53+
%arrayidx7.i = getelementptr inbounds i8, ptr addrspace(4) %0, i64 2
54+
%call.i.i.i16.i = tail call spir_func noundef ptr addrspace(1) @_Z41__spirv_GenericCastToPtrExplicit_ToGlobalPvi(ptr addrspace(4) noundef %arrayidx7.i, i32 noundef 5)
55+
%3 = tail call ptr addrspace(1) @llvm.ptr.annotation.p1.p1(ptr addrspace(1) %call.i.i.i16.i, ptr addrspace(1) @.str.11, ptr addrspace(1) @.str.1, i32 80, ptr addrspace(1) null)
56+
tail call spir_func void @_Z20__spirv_ocl_prefetchPU3AS1Kcm(ptr addrspace(1) noundef %3, i64 noundef 2)
57+
ret void
58+
}
59+
60+
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite)
61+
declare ptr addrspace(1) @llvm.ptr.annotation.p1.p1(ptr addrspace(1), ptr addrspace(1), ptr addrspace(1), i32, ptr addrspace(1))
62+
63+
; Function Attrs: convergent nounwind
64+
declare dso_local spir_func void @_Z20__spirv_ocl_prefetchPU3AS1Kcm(ptr addrspace(1) noundef, i64 noundef) local_unnamed_addr
65+
66+
; Function Attrs: convergent mustprogress nofree nounwind willreturn memory(none)
67+
declare dso_local spir_func noundef ptr addrspace(1) @_Z41__spirv_GenericCastToPtrExplicit_ToGlobalPvi(ptr addrspace(4) noundef, i32 noundef) local_unnamed_addr
68+
69+
!llvm.module.flags = !{!0, !1}
70+
!opencl.spir.version = !{!2}
71+
!spirv.Source = !{!3}
72+
!llvm.ident = !{!4}
73+
74+
; CHECK-LLVM: ![[MD1]] = !{![[MD10:.*]]}
75+
; ![[MD10]] = !{i32 6442, i32 0, i32 1}
76+
; CHECK-LLVM: ![[MD2]] = !{![[MD20:.*]]}
77+
; ![[MD20]] = !{i32 6442, i32 1, i32 1}
78+
; CHECK-LLVM: ![[MD3]] = !{![[MD30:.*]]}
79+
; ![[MD30]] = !{i32 6442, i32 2, i32 3}
80+
81+
!0 = !{i32 1, !"wchar_size", i32 4}
82+
!1 = !{i32 7, !"frame-pointer", i32 2}
83+
!2 = !{i32 1, i32 2}
84+
!3 = !{i32 4, i32 100000}
85+
!4 = !{!"clang version 18.0.0"}
86+
!5 = !{i32 1522}
87+
!6 = !{i32 -1}
88+
!7 = !{}
89+
!8 = !{i1 false}

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