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Merge pull request ARMmbed#3583 from jeromecoutant/PR_F7_CUBE_151
STM32F7 Cube FW new release v1.5.1
2 parents 3933ccf + f5b6220 commit e184511

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‎targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/stm32f746xx.h

Lines changed: 40 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
******************************************************************************
33
* @file stm32f746xx.h
44
* @author MCD Application Team
5-
* @version V1.1.0
6-
* @date 22-April-2016
5+
* @version V1.1.2
6+
* @date 23-September-2016
77
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer Header File.
88
*
99
* This file contains:
@@ -314,7 +314,6 @@ typedef struct
314314
__IO uint32_t IER; /*!< CEC interrupt enable register, Address offset:0x14 */
315315
}CEC_TypeDef;
316316

317-
318317
/**
319318
* @brief CRC calculation unit
320319
*/
@@ -407,7 +406,6 @@ typedef struct
407406
__IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */
408407
} DMA_TypeDef;
409408

410-
411409
/**
412410
* @brief DMA2D Controller
413411
*/
@@ -854,7 +852,6 @@ typedef struct
854852
__IO uint32_t DIR; /*!< Debug Information register, Address offset: 0x18 */
855853
} SPDIFRX_TypeDef;
856854

857-
858855
/**
859856
* @brief SD host Interface
860857
*/
@@ -1322,7 +1319,7 @@ typedef struct
13221319
#define IWDG ((IWDG_TypeDef *) IWDG_BASE)
13231320
#define SPI2 ((SPI_TypeDef *) SPI2_BASE)
13241321
#define SPI3 ((SPI_TypeDef *) SPI3_BASE)
1325-
#define SPDIFRX ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
1322+
#define SPDIFRX ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
13261323
#define USART2 ((USART_TypeDef *) USART2_BASE)
13271324
#define USART3 ((USART_TypeDef *) USART3_BASE)
13281325
#define UART4 ((USART_TypeDef *) UART4_BASE)
@@ -3667,7 +3664,6 @@ typedef struct
36673664

36683665
/******************** Bit definition for DMA2D_BGCLUT register **************/
36693666

3670-
36713667
/******************************************************************************/
36723668
/* */
36733669
/* External Interrupt/Event Controller */
@@ -3977,6 +3973,7 @@ typedef struct
39773973
#define FLASH_OPTCR1_BOOT_ADD0 0x0000FFFFU
39783974
#define FLASH_OPTCR1_BOOT_ADD1 0xFFFF0000U
39793975

3976+
39803977
/******************************************************************************/
39813978
/* */
39823979
/* Flexible Memory Controller */
@@ -6044,7 +6041,7 @@ typedef struct
60446041
#define RTC_CR_OSEL_1 0x00400000U
60456042
#define RTC_CR_POL 0x00100000U
60466043
#define RTC_CR_COSEL 0x00080000U
6047-
#define RTC_CR_BCK 0x00040000U
6044+
#define RTC_CR_BKP 0x00040000U
60486045
#define RTC_CR_SUB1H 0x00020000U
60496046
#define RTC_CR_ADD1H 0x00010000U
60506047
#define RTC_CR_TSIE 0x00008000U
@@ -6064,6 +6061,9 @@ typedef struct
60646061
#define RTC_CR_WUCKSEL_1 0x00000002U
60656062
#define RTC_CR_WUCKSEL_2 0x00000004U
60666063

6064+
/* Legacy define */
6065+
#define RTC_CR_BCK RTC_CR_BKP
6066+
60676067
/******************** Bits definition for RTC_ISR register ******************/
60686068
#define RTC_ISR_ITSF 0x00020000U
60696069
#define RTC_ISR_RECALPF 0x00010000U
@@ -6639,7 +6639,6 @@ typedef struct
66396639
#define SPDIFRX_DIR_THI 0x000013FFU /*!<Threshold LOW */
66406640
#define SPDIFRX_DIR_TLO 0x1FFF0000U /*!<Threshold HIGH */
66416641

6642-
66436642
/******************************************************************************/
66446643
/* */
66456644
/* SD host Interface */
@@ -8974,6 +8973,7 @@ typedef struct
89748973

89758974

89768975

8976+
89778977
/**
89788978
* @}
89798979
*/
@@ -9027,28 +9027,28 @@ typedef struct
90279027

90289028
/******************************* GPIO Instances *******************************/
90299029
#define IS_GPIO_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
9030-
((__INSTANCE__) == GPIOB) || \
9031-
((__INSTANCE__) == GPIOC) || \
9032-
((__INSTANCE__) == GPIOD) || \
9033-
((__INSTANCE__) == GPIOE) || \
9034-
((__INSTANCE__) == GPIOF) || \
9035-
((__INSTANCE__) == GPIOG) || \
9036-
((__INSTANCE__) == GPIOH) || \
9037-
((__INSTANCE__) == GPIOI) || \
9038-
((__INSTANCE__) == GPIOJ) || \
9039-
((__INSTANCE__) == GPIOK))
9030+
((__INSTANCE__) == GPIOB) || \
9031+
((__INSTANCE__) == GPIOC) || \
9032+
((__INSTANCE__) == GPIOD) || \
9033+
((__INSTANCE__) == GPIOE) || \
9034+
((__INSTANCE__) == GPIOF) || \
9035+
((__INSTANCE__) == GPIOG) || \
9036+
((__INSTANCE__) == GPIOH) || \
9037+
((__INSTANCE__) == GPIOI) || \
9038+
((__INSTANCE__) == GPIOJ) || \
9039+
((__INSTANCE__) == GPIOK))
90409040

90419041
#define IS_GPIO_AF_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
9042-
((__INSTANCE__) == GPIOB) || \
9043-
((__INSTANCE__) == GPIOC) || \
9044-
((__INSTANCE__) == GPIOD) || \
9045-
((__INSTANCE__) == GPIOE) || \
9046-
((__INSTANCE__) == GPIOF) || \
9047-
((__INSTANCE__) == GPIOG) || \
9048-
((__INSTANCE__) == GPIOH) || \
9049-
((__INSTANCE__) == GPIOI) || \
9050-
((__INSTANCE__) == GPIOJ) || \
9051-
((__INSTANCE__) == GPIOK))
9042+
((__INSTANCE__) == GPIOB) || \
9043+
((__INSTANCE__) == GPIOC) || \
9044+
((__INSTANCE__) == GPIOD) || \
9045+
((__INSTANCE__) == GPIOE) || \
9046+
((__INSTANCE__) == GPIOF) || \
9047+
((__INSTANCE__) == GPIOG) || \
9048+
((__INSTANCE__) == GPIOH) || \
9049+
((__INSTANCE__) == GPIOI) || \
9050+
((__INSTANCE__) == GPIOJ) || \
9051+
((__INSTANCE__) == GPIOK))
90529052

90539053
/****************************** CEC Instances *********************************/
90549054
#define IS_CEC_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == CEC)
@@ -9059,14 +9059,14 @@ typedef struct
90599059

90609060
/******************************** I2C Instances *******************************/
90619061
#define IS_I2C_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == I2C1) || \
9062-
((__INSTANCE__) == I2C2) || \
9063-
((__INSTANCE__) == I2C3) || \
9064-
((__INSTANCE__) == I2C4))
9062+
((__INSTANCE__) == I2C2) || \
9063+
((__INSTANCE__) == I2C3) || \
9064+
((__INSTANCE__) == I2C4))
90659065

90669066
/******************************** I2S Instances *******************************/
90679067
#define IS_I2S_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
9068-
((__INSTANCE__) == SPI2) || \
9069-
((__INSTANCE__) == SPI3))
9068+
((__INSTANCE__) == SPI2) || \
9069+
((__INSTANCE__) == SPI3))
90709070

90719071
/******************************* LPTIM Instances ********************************/
90729072
#define IS_LPTIM_INSTANCE(__INSTANCE__) ((__INSTANCE__) == LPTIM1)
@@ -9076,6 +9076,7 @@ typedef struct
90769076

90779077

90789078

9079+
90799080
/******************************* RNG Instances ********************************/
90809081
#define IS_RNG_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == RNG)
90819082

@@ -9098,11 +9099,11 @@ typedef struct
90989099

90999100
/******************************** SPI Instances *******************************/
91009101
#define IS_SPI_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
9101-
((__INSTANCE__) == SPI2) || \
9102-
((__INSTANCE__) == SPI3) || \
9103-
((__INSTANCE__) == SPI4) || \
9104-
((__INSTANCE__) == SPI5) || \
9105-
((__INSTANCE__) == SPI6))
9102+
((__INSTANCE__) == SPI2) || \
9103+
((__INSTANCE__) == SPI3) || \
9104+
((__INSTANCE__) == SPI4) || \
9105+
((__INSTANCE__) == SPI5) || \
9106+
((__INSTANCE__) == SPI6))
91069107

91079108
/****************** TIM Instances : All supported instances *******************/
91089109
#define IS_TIM_INSTANCE(__INSTANCE__) (((__INSTANCE__) == TIM1) || \

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/stm32f7xx.h

Lines changed: 24 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
******************************************************************************
33
* @file stm32f7xx.h
44
* @author MCD Application Team
5-
* @version V1.1.0
6-
* @date 22-April-2016
5+
* @version V1.1.2
6+
* @date 23-September-2016
77
* @brief CMSIS STM32F7xx Device Peripheral Access Layer Header File.
88
*
99
* The file is the unique include file that the application programmer
@@ -75,7 +75,8 @@
7575
application
7676
*/
7777
#if !defined (STM32F756xx) && !defined (STM32F746xx) && !defined (STM32F745xx) && !defined (STM32F767xx) && \
78-
!defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx)
78+
!defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx) && !defined (STM32F722xx) && \
79+
!defined (STM32F723xx) && !defined (STM32F732xx) && !defined (STM32F733xx)
7980
/* #define STM32F756xx */ /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
8081
STM32F756NG Devices */
8182
#define STM32F746xx /*!< STM32F746VE, STM32F746VG, STM32F746ZE, STM32F746ZG, STM32F746IE, STM32F746IG,
@@ -84,11 +85,16 @@
8485
/* #define STM32F765xx */ /*!< STM32F765BI, STM32F765BG, STM32F765NI, STM32F765NG, STM32F765II, STM32F765IG,
8586
STM32F765ZI, STM32F765ZG, STM32F765VI, STM32F765VG Devices */
8687
/* #define STM32F767xx */ /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
87-
STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI, STM32F768AI Devices */
88+
STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI Devices */
8889
/* #define STM32F769xx */ /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
89-
STM32F769NG, STM32F769NI Devices */
90-
/* #define STM32F777xx */ /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI, STM32F778AI Devices */
91-
/* #define STM32F779xx */ /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI Devices */
90+
STM32F769NG, STM32F769NI, STM32F768AI Devices */
91+
/* #define STM32F777xx */ /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI Devices */
92+
/* #define STM32F779xx */ /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI, STM32F778AI Devices */
93+
/* #define STM32F722xx */ /*!< STM32F722IE, STM32F722ZE, STM32F722VE, STM32F722RE, STM32F722IC, STM32F722ZC,
94+
STM32F722VC, STM32F722RC Devices */
95+
/* #define STM32F723xx */ /*!< STM32F723IE, STM32F723ZE, STM32F723VE, STM32F723IC, STM32F723ZC, STM32F723VC Devices */
96+
/* #define STM32F732xx */ /*!< STM32F732IE, STM32F732ZE, STM32F732VE, STM32F732RE Devices */
97+
/* #define STM32F733xx */ /*!< STM32F733IE, STM32F733ZE, STM32F733VE Devices */
9298
#endif
9399

94100
/* Tip: To avoid modifying this file each time you need to switch between these
@@ -105,11 +111,11 @@
105111
#endif /* USE_HAL_DRIVER */
106112

107113
/**
108-
* @brief CMSIS Device version number V1.1.0
114+
* @brief CMSIS Device version number V1.1.2
109115
*/
110116
#define __STM32F7_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
111117
#define __STM32F7_CMSIS_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
112-
#define __STM32F7_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
118+
#define __STM32F7_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
113119
#define __STM32F7_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
114120
#define __STM32F7_CMSIS_VERSION ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
115121
|(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
@@ -122,7 +128,15 @@
122128
/** @addtogroup Device_Included
123129
* @{
124130
*/
125-
#if defined(STM32F756xx)
131+
#if defined(STM32F722xx)
132+
#include "stm32f722xx.h"
133+
#elif defined(STM32F723xx)
134+
#include "stm32f723xx.h"
135+
#elif defined(STM32F732xx)
136+
#include "stm32f732xx.h"
137+
#elif defined(STM32F733xx)
138+
#include "stm32f733xx.h"
139+
#elif defined(STM32F756xx)
126140
#include "stm32f756xx.h"
127141
#elif defined(STM32F746xx)
128142
#include "stm32f746xx.h"

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/system_stm32f7xx.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
******************************************************************************
33
* @file system_stm32f7xx.c
44
* @author MCD Application Team
5-
* @version V1.0.2
6-
* @date 21-September-2015
5+
* @version V1.1.2
6+
* @date 23-September-2016
77
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer System Source File.
88
*
99
* This file provides two functions and one global variable to be called from

‎targets/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device/system_stm32f7xx.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
******************************************************************************
33
* @file system_stm32f7xx.h
44
* @author MCD Application Team
5-
* @version V1.1.0
6-
* @date 22-April-2016
5+
* @version V1.1.2
6+
* @date 23-September-2016
77
* @brief CMSIS Cortex-M7 Device System Source File for STM32F7xx devices.
88
******************************************************************************
99
* @attention

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