Skip to content

Commit 9b405ac

Browse files
authored
Merge pull request #4899 from Rageking8/nits-for-rdtsc-and-rdtscp
Nits for rdtsc and rdtscp
2 parents 5e1fd36 + 3b933d7 commit 9b405ac

File tree

2 files changed

+3
-2
lines changed

2 files changed

+3
-2
lines changed

docs/intrinsics/rdtsc.md

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -62,4 +62,5 @@ int main()
6262

6363
## See also
6464

65+
[__rdtscp](../intrinsics/rdtscp.md)\
6566
[Compiler intrinsics](../intrinsics/compiler-intrinsics.md)

docs/intrinsics/rdtscp.md

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ ms.assetid: f17d9a9c-88bb-44e0-b69d-d516bc1c93ee
1010

1111
**Microsoft Specific**
1212

13-
Generates the `rdtscp` instruction, writes `TSC_AUX[31:0`] to memory, and returns the 64-bit Time Stamp Counter (`TSC)` result.
13+
Generates the `rdtscp` instruction, writes `TSC_AUX[31:0]` to memory, and returns the 64-bit Time Stamp Counter (TSC) result.
1414

1515
## Syntax
1616

@@ -39,7 +39,7 @@ A 64-bit unsigned integer tick count.
3939

4040
## Remarks
4141

42-
The `__rdtscp` intrinsic generates the `rdtscp` instruction. To determine hardware support for this instruction, call the `__cpuid` intrinsic with `InfoType=0x80000001` and check bit 27 of `CPUInfo[3] (EDX)`. This bit is 1 if the instruction is supported, and 0 otherwise. If you run code that uses the intrinsic on hardware that doesn't support the `rdtscp` instruction, the results are unpredictable.
42+
The `__rdtscp` intrinsic generates the `rdtscp` instruction. To determine hardware support for this instruction, call the `__cpuid` intrinsic with `InfoType=0x80000001` and check bit 27 of `CPUInfo[3] (EDX)`. This bit is 1 if the instruction is supported, and 0 otherwise. If you run code that uses the intrinsic on hardware that doesn't support the `rdtscp` instruction, the results are unpredictable.
4343

4444
This instruction waits until all previous instructions have executed and all previous loads are globally visible. However, it isn't a serializing instruction. For more information, see the Intel and AMD manuals.
4545

0 commit comments

Comments
 (0)