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ronliebronlieb
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merge main into amd-stg-open
Change-Id: I4386c8263223eeac95a3990a750b177c6e1443ba
2 parents 1fc95db + 21361bb commit 4881e5a

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29 files changed

+403
-130
lines changed

29 files changed

+403
-130
lines changed

‎bolt/utils/nfc-stat-parser.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ def main():
1919
)
2020
parser.add_argument(
2121
"--check_longer_than",
22-
default=0.5,
22+
default=1,
2323
type=float,
2424
help="Only warn on tests longer than X seconds for at least one side",
2525
)

‎clang/include/clang/Frontend/ASTUnit.h

Lines changed: 10 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -691,18 +691,16 @@ class ASTUnit {
691691
/// lifetime is expected to extend past that of the returned ASTUnit.
692692
///
693693
/// \returns - The initialized ASTUnit or null if the AST failed to load.
694-
static std::unique_ptr<ASTUnit>
695-
LoadFromASTFile(const std::string &Filename,
696-
const PCHContainerReader &PCHContainerRdr, WhatToLoad ToLoad,
697-
IntrusiveRefCntPtr<DiagnosticsEngine> Diags,
698-
const FileSystemOptions &FileSystemOpts,
699-
std::shared_ptr<HeaderSearchOptions> HSOpts,
700-
bool UseDebugInfo = false, bool OnlyLocalDecls = false,
701-
CaptureDiagsKind CaptureDiagnostics = CaptureDiagsKind::None,
702-
bool AllowASTWithCompilerErrors = false,
703-
bool UserFilesAreVolatile = false,
704-
IntrusiveRefCntPtr<llvm::vfs::FileSystem> VFS =
705-
llvm::vfs::getRealFileSystem());
694+
static std::unique_ptr<ASTUnit> LoadFromASTFile(
695+
const std::string &Filename, const PCHContainerReader &PCHContainerRdr,
696+
WhatToLoad ToLoad, IntrusiveRefCntPtr<DiagnosticsEngine> Diags,
697+
const FileSystemOptions &FileSystemOpts,
698+
std::shared_ptr<HeaderSearchOptions> HSOpts, bool OnlyLocalDecls = false,
699+
CaptureDiagsKind CaptureDiagnostics = CaptureDiagsKind::None,
700+
bool AllowASTWithCompilerErrors = false,
701+
bool UserFilesAreVolatile = false,
702+
IntrusiveRefCntPtr<llvm::vfs::FileSystem> VFS =
703+
llvm::vfs::getRealFileSystem());
706704

707705
private:
708706
/// Helper function for \c LoadFromCompilerInvocation() and

‎clang/lib/Frontend/ASTMerge.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,7 @@ void ASTMergeAction::ExecuteAction() {
4848
/*ShouldOwnClient=*/true));
4949
std::unique_ptr<ASTUnit> Unit = ASTUnit::LoadFromASTFile(
5050
ASTFiles[I], CI.getPCHContainerReader(), ASTUnit::LoadEverything, Diags,
51-
CI.getFileSystemOpts(), CI.getHeaderSearchOptsPtr(), false);
51+
CI.getFileSystemOpts(), CI.getHeaderSearchOptsPtr());
5252

5353
if (!Unit)
5454
continue;

‎clang/lib/Frontend/ASTUnit.cpp

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -790,10 +790,9 @@ std::unique_ptr<ASTUnit> ASTUnit::LoadFromASTFile(
790790
const std::string &Filename, const PCHContainerReader &PCHContainerRdr,
791791
WhatToLoad ToLoad, IntrusiveRefCntPtr<DiagnosticsEngine> Diags,
792792
const FileSystemOptions &FileSystemOpts,
793-
std::shared_ptr<HeaderSearchOptions> HSOpts, bool UseDebugInfo,
794-
bool OnlyLocalDecls, CaptureDiagsKind CaptureDiagnostics,
795-
bool AllowASTWithCompilerErrors, bool UserFilesAreVolatile,
796-
IntrusiveRefCntPtr<llvm::vfs::FileSystem> VFS) {
793+
std::shared_ptr<HeaderSearchOptions> HSOpts, bool OnlyLocalDecls,
794+
CaptureDiagsKind CaptureDiagnostics, bool AllowASTWithCompilerErrors,
795+
bool UserFilesAreVolatile, IntrusiveRefCntPtr<llvm::vfs::FileSystem> VFS) {
797796
std::unique_ptr<ASTUnit> AST(new ASTUnit(true));
798797

799798
// Recover resources if we crash before exiting this method.

‎clang/lib/Frontend/FrontendAction.cpp

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -621,7 +621,7 @@ bool FrontendAction::BeginSourceFile(CompilerInstance &CI,
621621
std::unique_ptr<ASTUnit> AST = ASTUnit::LoadFromASTFile(
622622
std::string(InputFile), CI.getPCHContainerReader(),
623623
ASTUnit::LoadPreprocessorOnly, ASTDiags, CI.getFileSystemOpts(),
624-
/*HeaderSearchOptions=*/nullptr, CI.getCodeGenOpts().DebugTypeExtRefs);
624+
/*HeaderSearchOptions=*/nullptr);
625625
if (!AST)
626626
return false;
627627

@@ -689,8 +689,7 @@ bool FrontendAction::BeginSourceFile(CompilerInstance &CI,
689689
std::unique_ptr<ASTUnit> AST = ASTUnit::LoadFromASTFile(
690690
std::string(InputFile), CI.getPCHContainerReader(),
691691
ASTUnit::LoadEverything, Diags, CI.getFileSystemOpts(),
692-
CI.getHeaderSearchOptsPtr(),
693-
CI.getCodeGenOpts().DebugTypeExtRefs);
692+
CI.getHeaderSearchOptsPtr());
694693

695694
if (!AST)
696695
return false;

‎clang/tools/c-index-test/core_main.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -276,7 +276,7 @@ static bool printSourceSymbolsFromModule(StringRef modulePath,
276276
CompilerInstance::createDiagnostics(new DiagnosticOptions());
277277
std::unique_ptr<ASTUnit> AU = ASTUnit::LoadFromASTFile(
278278
std::string(modulePath), *pchRdr, ASTUnit::LoadASTOnly, Diags,
279-
FileSystemOpts, HSOpts, /*UseDebugInfo=*/false,
279+
FileSystemOpts, HSOpts,
280280
/*OnlyLocalDecls=*/true, CaptureDiagsKind::None,
281281
/*AllowASTWithCompilerErrors=*/true,
282282
/*UserFilesAreVolatile=*/false);

‎clang/tools/libclang/CIndex.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3877,8 +3877,8 @@ enum CXErrorCode clang_createTranslationUnit2(CXIndex CIdx,
38773877
std::unique_ptr<ASTUnit> AU = ASTUnit::LoadFromASTFile(
38783878
ast_filename, CXXIdx->getPCHContainerOperations()->getRawReader(),
38793879
ASTUnit::LoadEverything, Diags, FileSystemOpts, HSOpts,
3880-
/*UseDebugInfo=*/false, CXXIdx->getOnlyLocalDecls(),
3881-
CaptureDiagsKind::All, /*AllowASTWithCompilerErrors=*/true,
3880+
CXXIdx->getOnlyLocalDecls(), CaptureDiagsKind::All,
3881+
/*AllowASTWithCompilerErrors=*/true,
38823882
/*UserFilesAreVolatile=*/true);
38833883
*out_TU = MakeCXTranslationUnit(CXXIdx, std::move(AU));
38843884
return *out_TU ? CXError_Success : CXError_Failure;

‎clang/unittests/Frontend/ASTUnitTest.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -93,8 +93,7 @@ TEST_F(ASTUnitTest, SaveLoadPreservesLangOptionsInPrintingPolicy) {
9393

9494
std::unique_ptr<ASTUnit> AU = ASTUnit::LoadFromASTFile(
9595
std::string(ASTFileName.str()), PCHContainerOps->getRawReader(),
96-
ASTUnit::LoadEverything, Diags, FileSystemOptions(), HSOpts,
97-
/*UseDebugInfo=*/false);
96+
ASTUnit::LoadEverything, Diags, FileSystemOptions(), HSOpts);
9897

9998
if (!AU)
10099
FAIL() << "failed to load ASTUnit";

‎flang/lib/Semantics/check-acc-structure.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -218,13 +218,18 @@ void AccStructureChecker::Leave(const parser::OpenACCCombinedConstruct &x) {
218218
const auto &beginBlockDir{std::get<parser::AccBeginCombinedDirective>(x.t)};
219219
const auto &combinedDir{
220220
std::get<parser::AccCombinedDirective>(beginBlockDir.t)};
221+
auto &doCons{std::get<std::optional<parser::DoConstruct>>(x.t)};
221222
switch (combinedDir.v) {
222223
case llvm::acc::Directive::ACCD_kernels_loop:
223224
case llvm::acc::Directive::ACCD_parallel_loop:
224225
case llvm::acc::Directive::ACCD_serial_loop:
225226
// Restriction - line 1004-1005
226227
CheckOnlyAllowedAfter(llvm::acc::Clause::ACCC_device_type,
227228
computeConstructOnlyAllowedAfterDeviceTypeClauses);
229+
if (doCons) {
230+
const parser::Block &block{std::get<parser::Block>(doCons->t)};
231+
CheckNoBranching(block, GetContext().directive, beginBlockDir.source);
232+
}
228233
break;
229234
default:
230235
break;

‎flang/test/Parser/acc-unparse.f90

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@ program bug47659
99
!$acc parallel loop
1010
do j = 1, 10
1111
if (j == 2) then
12-
exit label1
12+
stop 1
1313
end if
1414
end do
1515
end do label1

‎flang/test/Semantics/OpenACC/acc-branch.f90

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,27 @@ subroutine openacc_clause_validity
1919
end do
2020
!$acc end parallel
2121

22+
!$acc parallel loop
23+
do i = 1, N
24+
a(i) = 3.14
25+
!ERROR: RETURN statement is not allowed in a PARALLEL LOOP construct
26+
return
27+
end do
28+
29+
!$acc serial loop
30+
do i = 1, N
31+
a(i) = 3.14
32+
!ERROR: RETURN statement is not allowed in a SERIAL LOOP construct
33+
return
34+
end do
35+
36+
!$acc kernels loop
37+
do i = 1, N
38+
a(i) = 3.14
39+
!ERROR: RETURN statement is not allowed in a KERNELS LOOP construct
40+
return
41+
end do
42+
2243
!$acc parallel
2344
!$acc loop
2445
do i = 1, N

‎llvm/docs/AMDGPUUsage.rst

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2051,7 +2051,12 @@ relocatable fields are:
20512051
Following notations are used for specifying relocation calculations:
20522052

20532053
**A**
2054-
Represents the addend used to compute the value of the relocatable field.
2054+
Represents the addend used to compute the value of the relocatable field. If
2055+
the addend field is smaller than 64 bits then it is zero-extended to 64 bits
2056+
for use in the calculations below. (In practice this only affects ``_HI``
2057+
relocation types on Mesa/AMDPAL, where the addend comes from the 32-bit field
2058+
but the result of the calculation depends on the high part of the full 64-bit
2059+
address.)
20552060

20562061
**G**
20572062
Represents the offset into the global offset table at which the relocation

‎llvm/lib/Target/AArch64/AArch64SystemOperands.td

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -738,6 +738,7 @@ def : ROSysReg<"ID_AA64PFR1_EL1", 0b11, 0b000, 0b0000, 0b0100, 0b001>;
738738
def : ROSysReg<"ID_AA64PFR2_EL1", 0b11, 0b000, 0b0000, 0b0100, 0b010>;
739739
def : ROSysReg<"ID_AA64DFR0_EL1", 0b11, 0b000, 0b0000, 0b0101, 0b000>;
740740
def : ROSysReg<"ID_AA64DFR1_EL1", 0b11, 0b000, 0b0000, 0b0101, 0b001>;
741+
def : ROSysReg<"ID_AA64DFR2_EL1", 0b11, 0b000, 0b0000, 0b0101, 0b010>;
741742
def : ROSysReg<"ID_AA64AFR0_EL1", 0b11, 0b000, 0b0000, 0b0101, 0b100>;
742743
def : ROSysReg<"ID_AA64AFR1_EL1", 0b11, 0b000, 0b0000, 0b0101, 0b101>;
743744
def : ROSysReg<"ID_AA64ISAR0_EL1", 0b11, 0b000, 0b0000, 0b0110, 0b000>;
@@ -1937,3 +1938,11 @@ let Requires = [{ {AArch64::FeatureFPMR} }] in {
19371938
def : ROSysReg<"ID_AA64FPFR0_EL1", 0b11, 0b000, 0b0000, 0b0100, 0b111>;
19381939
def : RWSysReg<"FPMR", 0b11, 0b011, 0b0100, 0b0100, 0b010>;
19391940
}
1941+
1942+
// v9.5a Software Stepping Enhancements (FEAT_STEP2)
1943+
// Op0 Op1 CRn CRm Op2
1944+
def : RWSysReg<"MDSTEPOP_EL1", 0b10, 0b000, 0b0000, 0b0101, 0b010>;
1945+
1946+
// v9.5a System PMU zero register (FEAT_SPMU2)
1947+
// Op0 Op1 CRn CRm Op2
1948+
def : WOSysReg<"SPMZR_EL0", 0b10, 0b011, 0b1001, 0b1100, 0b100>;

‎llvm/lib/Target/AMDGPU/SIFoldOperands.cpp

Lines changed: 85 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -80,6 +80,10 @@ class SIFoldOperands : public MachineFunctionPass {
8080

8181
bool updateOperand(FoldCandidate &Fold) const;
8282

83+
bool canUseImmWithOpSel(FoldCandidate &Fold) const;
84+
85+
bool tryFoldImmWithOpSel(FoldCandidate &Fold) const;
86+
8387
bool tryAddToFoldList(SmallVectorImpl<FoldCandidate> &FoldList,
8488
MachineInstr *MI, unsigned OpNo,
8589
MachineOperand *OpToFold) const;
@@ -196,62 +200,85 @@ FunctionPass *llvm::createSIFoldOperandsPass() {
196200
return new SIFoldOperands();
197201
}
198202

199-
bool SIFoldOperands::updateOperand(FoldCandidate &Fold) const {
203+
bool SIFoldOperands::canUseImmWithOpSel(FoldCandidate &Fold) const {
200204
MachineInstr *MI = Fold.UseMI;
201205
MachineOperand &Old = MI->getOperand(Fold.UseOpNo);
202-
assert(Old.isReg());
206+
const uint64_t TSFlags = MI->getDesc().TSFlags;
203207

208+
assert(Old.isReg() && Fold.isImm());
204209

205-
const uint64_t TSFlags = MI->getDesc().TSFlags;
206-
if (Fold.isImm()) {
207-
if (TSFlags & SIInstrFlags::IsPacked && !(TSFlags & SIInstrFlags::IsMAI) &&
208-
AMDGPU::isFoldableLiteralV216(Fold.ImmToFold,
209-
ST->hasInv2PiInlineImm())) {
210-
if (ST->hasDOTOpSelHazard() && (TSFlags & SIInstrFlags::IsDOT))
211-
return false; // Prevent further folding of this operand without opsel.
212-
213-
// Set op_sel/op_sel_hi on this operand or bail out if op_sel is
214-
// already set.
215-
unsigned Opcode = MI->getOpcode();
216-
int OpNo = MI->getOperandNo(&Old);
217-
int ModIdx = -1;
218-
if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0))
219-
ModIdx = AMDGPU::OpName::src0_modifiers;
220-
else if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1))
221-
ModIdx = AMDGPU::OpName::src1_modifiers;
222-
else if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src2))
223-
ModIdx = AMDGPU::OpName::src2_modifiers;
224-
assert(ModIdx != -1);
225-
ModIdx = AMDGPU::getNamedOperandIdx(Opcode, ModIdx);
226-
MachineOperand &Mod = MI->getOperand(ModIdx);
227-
unsigned Val = Mod.getImm();
228-
if (!(Val & SISrcMods::OP_SEL_0) && (Val & SISrcMods::OP_SEL_1)) {
229-
// Only apply the following transformation if that operand requires
230-
// a packed immediate.
231-
switch (TII->get(Opcode).operands()[OpNo].OperandType) {
232-
case AMDGPU::OPERAND_REG_IMM_V2FP16:
233-
case AMDGPU::OPERAND_REG_IMM_V2INT16:
234-
case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:
235-
case AMDGPU::OPERAND_REG_INLINE_C_V2INT16:
236-
// If upper part is all zero we do not need op_sel_hi.
237-
if (!isUInt<16>(Fold.ImmToFold)) {
238-
if (!(Fold.ImmToFold & 0xffff)) {
239-
Mod.setImm(Mod.getImm() | SISrcMods::OP_SEL_0);
240-
Mod.setImm(Mod.getImm() & ~SISrcMods::OP_SEL_1);
241-
Old.ChangeToImmediate((Fold.ImmToFold >> 16) & 0xffff);
242-
return true;
243-
}
244-
Mod.setImm(Mod.getImm() & ~SISrcMods::OP_SEL_1);
245-
Old.ChangeToImmediate(Fold.ImmToFold & 0xffff);
246-
return true;
247-
}
248-
break;
249-
default:
250-
break;
251-
}
252-
}
253-
}
210+
if (!(TSFlags & SIInstrFlags::IsPacked) || (TSFlags & SIInstrFlags::IsMAI) ||
211+
(ST->hasDOTOpSelHazard() && (TSFlags & SIInstrFlags::IsDOT)) ||
212+
isUInt<16>(Fold.ImmToFold) ||
213+
!AMDGPU::isFoldableLiteralV216(Fold.ImmToFold, ST->hasInv2PiInlineImm()))
214+
return false;
215+
216+
unsigned Opcode = MI->getOpcode();
217+
int OpNo = MI->getOperandNo(&Old);
218+
uint8_t OpType = TII->get(Opcode).operands()[OpNo].OperandType;
219+
switch (OpType) {
220+
default:
221+
return false;
222+
case AMDGPU::OPERAND_REG_IMM_V2FP16:
223+
case AMDGPU::OPERAND_REG_IMM_V2INT16:
224+
case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:
225+
case AMDGPU::OPERAND_REG_INLINE_C_V2INT16:
226+
break;
227+
}
228+
229+
return true;
230+
}
231+
232+
bool SIFoldOperands::tryFoldImmWithOpSel(FoldCandidate &Fold) const {
233+
MachineInstr *MI = Fold.UseMI;
234+
MachineOperand &Old = MI->getOperand(Fold.UseOpNo);
235+
unsigned Opcode = MI->getOpcode();
236+
int OpNo = MI->getOperandNo(&Old);
237+
238+
// Set op_sel/op_sel_hi on this operand or bail out if op_sel is
239+
// already set.
240+
int ModIdx = -1;
241+
if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0))
242+
ModIdx = AMDGPU::OpName::src0_modifiers;
243+
else if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1))
244+
ModIdx = AMDGPU::OpName::src1_modifiers;
245+
else if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src2))
246+
ModIdx = AMDGPU::OpName::src2_modifiers;
247+
assert(ModIdx != -1);
248+
ModIdx = AMDGPU::getNamedOperandIdx(Opcode, ModIdx);
249+
MachineOperand &Mod = MI->getOperand(ModIdx);
250+
unsigned Val = Mod.getImm();
251+
if ((Val & SISrcMods::OP_SEL_0) || !(Val & SISrcMods::OP_SEL_1))
252+
return false;
253+
254+
// Only apply the following transformation if that operand requires
255+
// a packed immediate.
256+
// If upper part is all zero we do not need op_sel_hi.
257+
if (!(Fold.ImmToFold & 0xffff)) {
258+
MachineOperand New =
259+
MachineOperand::CreateImm((Fold.ImmToFold >> 16) & 0xffff);
260+
if (!TII->isOperandLegal(*MI, OpNo, &New))
261+
return false;
262+
Mod.setImm(Mod.getImm() | SISrcMods::OP_SEL_0);
263+
Mod.setImm(Mod.getImm() & ~SISrcMods::OP_SEL_1);
264+
Old.ChangeToImmediate((Fold.ImmToFold >> 16) & 0xffff);
265+
return true;
254266
}
267+
MachineOperand New = MachineOperand::CreateImm(Fold.ImmToFold & 0xffff);
268+
if (!TII->isOperandLegal(*MI, OpNo, &New))
269+
return false;
270+
Mod.setImm(Mod.getImm() & ~SISrcMods::OP_SEL_1);
271+
Old.ChangeToImmediate(Fold.ImmToFold & 0xffff);
272+
return true;
273+
}
274+
275+
bool SIFoldOperands::updateOperand(FoldCandidate &Fold) const {
276+
MachineInstr *MI = Fold.UseMI;
277+
MachineOperand &Old = MI->getOperand(Fold.UseOpNo);
278+
assert(Old.isReg());
279+
280+
if (Fold.isImm() && canUseImmWithOpSel(Fold))
281+
return tryFoldImmWithOpSel(Fold);
255282

256283
if ((Fold.isImm() || Fold.isFI() || Fold.isGlobal()) && Fold.needsShrink()) {
257284
MachineBasicBlock *MBB = MI->getParent();
@@ -383,7 +410,13 @@ bool SIFoldOperands::tryAddToFoldList(SmallVectorImpl<FoldCandidate> &FoldList,
383410
return false;
384411
};
385412

386-
if (!TII->isOperandLegal(*MI, OpNo, OpToFold)) {
413+
bool IsLegal = TII->isOperandLegal(*MI, OpNo, OpToFold);
414+
if (!IsLegal && OpToFold->isImm()) {
415+
FoldCandidate Fold(MI, OpNo, OpToFold);
416+
IsLegal = canUseImmWithOpSel(Fold);
417+
}
418+
419+
if (!IsLegal) {
387420
// Special case for v_mac_{f16, f32}_e64 if we are trying to fold into src2
388421
unsigned NewOpc = macToMad(Opc);
389422
if (NewOpc != AMDGPU::INSTRUCTION_LIST_END) {

‎llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Lines changed: 6 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -4195,12 +4195,15 @@ bool SIInstrInfo::isInlineConstant(const MachineOperand &MO,
41954195
case AMDGPU::OPERAND_REG_IMM_V2INT16:
41964196
case AMDGPU::OPERAND_REG_INLINE_C_V2INT16:
41974197
case AMDGPU::OPERAND_REG_INLINE_AC_V2INT16:
4198-
// This suffers the same problem as the scalar 16-bit cases.
4199-
return AMDGPU::isInlinableIntLiteralV216(Imm);
4198+
return (isInt<16>(Imm) || isUInt<16>(Imm)) &&
4199+
AMDGPU::isInlinableIntLiteral((int16_t)Imm);
42004200
case AMDGPU::OPERAND_REG_IMM_FP16:
42014201
case AMDGPU::OPERAND_REG_IMM_FP16_DEFERRED:
42024202
case AMDGPU::OPERAND_REG_INLINE_C_FP16:
4203-
case AMDGPU::OPERAND_REG_INLINE_AC_FP16: {
4203+
case AMDGPU::OPERAND_REG_INLINE_AC_FP16:
4204+
case AMDGPU::OPERAND_REG_IMM_V2FP16:
4205+
case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:
4206+
case AMDGPU::OPERAND_REG_INLINE_AC_V2FP16: {
42044207
if (isInt<16>(Imm) || isUInt<16>(Imm)) {
42054208
// A few special case instructions have 16-bit operands on subtargets
42064209
// where 16-bit instructions are not legal.
@@ -4213,12 +4216,6 @@ bool SIInstrInfo::isInlineConstant(const MachineOperand &MO,
42134216

42144217
return false;
42154218
}
4216-
case AMDGPU::OPERAND_REG_IMM_V2FP16:
4217-
case AMDGPU::OPERAND_REG_INLINE_C_V2FP16:
4218-
case AMDGPU::OPERAND_REG_INLINE_AC_V2FP16: {
4219-
uint32_t Trunc = static_cast<uint32_t>(Imm);
4220-
return AMDGPU::isInlinableLiteralV216(Trunc, ST.hasInv2PiInlineImm());
4221-
}
42224219
case AMDGPU::OPERAND_KIMM32:
42234220
case AMDGPU::OPERAND_KIMM16:
42244221
return false;

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