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epilkkzhuravl
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[AMDGPU] Emit CFI when spilling SGPR to memory
I think this was probably just caused by a bad merge, added a test. Fixes SWDEV-457882 Change-Id: I763ece92e55630f3a8f57616c6ee8957cd845119
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llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2242,7 +2242,7 @@ bool SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
22422242
case AMDGPU::SI_SPILL_S96_SAVE:
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case AMDGPU::SI_SPILL_S64_SAVE:
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case AMDGPU::SI_SPILL_S32_SAVE: {
2245-
return spillSGPR(MI, Index, RS);
2245+
return spillSGPR(MI, Index, RS, nullptr, nullptr, false, false, NeedsCFI);
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}
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// SGPR register restore

llvm/test/CodeGen/AMDGPU/amdgpu-spill-cfi-saved-regs.ll

Lines changed: 55 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -137,10 +137,65 @@ define void @callee_need_to_spill_fp_exec_to_memory() #2 {
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ret void
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}
139139

140+
define internal void @caller_needs_to_spill_pc_to_memory() #3 {
141+
call void asm sideeffect "; clobber all VGPRs",
142+
"~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9}
143+
,~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19}
144+
,~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29}
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,~{v30},~{v31},~{v32},~{v33},~{v34},~{v35},~{v36},~{v37},~{v38},~{v39}
146+
,~{v40},~{v41},~{v42},~{v43},~{v44},~{v45},~{v46},~{v47},~{v48},~{v49}
147+
,~{v50},~{v51},~{v52},~{v53},~{v54},~{v55},~{v56},~{v57},~{v58},~{v59}
148+
,~{v60},~{v61},~{v62},~{v63},~{v64},~{v65},~{v66},~{v67},~{v68},~{v69}
149+
,~{v70},~{v71},~{v72},~{v73},~{v74},~{v75},~{v76},~{v77},~{v78},~{v79}
150+
,~{v80},~{v81},~{v82},~{v83},~{v84},~{v85},~{v86},~{v87},~{v88},~{v89}
151+
,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99}
152+
,~{v100},~{v101},~{v102},~{v103},~{v104},~{v105},~{v106},~{v107},~{v108},~{v109}
153+
,~{v110},~{v111},~{v112},~{v113},~{v114},~{v115},~{v116},~{v117},~{v118},~{v119}
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,~{v120},~{v121},~{v122},~{v123},~{v124},~{v125},~{v126},~{v127},~{v128},~{v129}
155+
,~{v130},~{v131},~{v132},~{v133},~{v134},~{v135},~{v136},~{v137},~{v138},~{v139}
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,~{v140},~{v141},~{v142},~{v143},~{v144},~{v145},~{v146},~{v147},~{v148},~{v149}
157+
,~{v150},~{v151},~{v152},~{v153},~{v154},~{v155},~{v156},~{v157},~{v158},~{v159}
158+
,~{v160},~{v161},~{v162},~{v163},~{v164},~{v165},~{v166},~{v167},~{v168},~{v169}
159+
,~{v170},~{v171},~{v172},~{v173},~{v174},~{v175},~{v176},~{v177},~{v178},~{v179}
160+
,~{v180},~{v181},~{v182},~{v183},~{v184},~{v185},~{v186},~{v187},~{v188},~{v189}
161+
,~{v190},~{v191},~{v192},~{v193},~{v194},~{v195},~{v196},~{v197},~{v198},~{v199}
162+
,~{v200},~{v201},~{v202},~{v203},~{v204},~{v205},~{v206},~{v207},~{v208},~{v209}
163+
,~{v210},~{v211},~{v212},~{v213},~{v214},~{v215},~{v216},~{v217},~{v218},~{v219}
164+
,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229}
165+
,~{v230},~{v231},~{v232},~{v233},~{v234},~{v235},~{v236},~{v237},~{v238},~{v239}
166+
,~{v240},~{v241},~{v242},~{v243},~{v244},~{v245},~{v246},~{v247},~{v248},~{v249}
167+
,~{v250},~{v251},~{v252},~{v253},~{v254},~{v255}" () #3
168+
ret void
169+
}
170+
171+
; WAVE64-LABEL: need_to_spill_pc_to_mem:
172+
; WAVE64: s_mov_b64 exec, 3
173+
; WAVE64-NEXT: buffer_store_dword [[TEMP_VGPR:v[0-9]+]]
174+
; WAVE64-NEXT: v_writelane_b32 [[TEMP_VGPR]], s30, 0
175+
; WAVE64-NEXT: v_writelane_b32 [[TEMP_VGPR]], s31, 1
176+
; WAVE64-NEXT: buffer_store_dword [[TEMP_VGPR]], off, s[0:3], s33 offset:
177+
; WAVE64-NEXT: .cfi_offset 16,
178+
; WAVE64-NEXT: buffer_load_dword [[TEMP_VGPR]]
179+
180+
; WAVE32-LABEL: need_to_spill_pc_to_mem:
181+
; WAVE32: s_mov_b32 exec_lo, 3
182+
; WAVE32-NEXT: buffer_store_dword [[TEMP_VGPR:v[0-9]+]]
183+
; WAVE32-NEXT: v_writelane_b32 [[TEMP_VGPR]], s30, 0
184+
; WAVE32-NEXT: v_writelane_b32 [[TEMP_VGPR]], s31, 1
185+
; WAVE32-NEXT: buffer_store_dword [[TEMP_VGPR]], off, s[0:3], s33 offset:
186+
; WAVE32-NEXT: .cfi_offset 16,
187+
; WAVE32-NEXT: buffer_load_dword [[TEMP_VGPR]]
188+
189+
define void @need_to_spill_pc_to_mem() #3 {
190+
call void @caller_needs_to_spill_pc_to_memory()
191+
ret void
192+
}
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141194
attributes #0 = { nounwind }
142195
attributes #1 = { nounwind "amdgpu-waves-per-eu"="10,10" }
143196
attributes #2 = { nounwind "frame-pointer"="all" "amdgpu-waves-per-eu"="12,12" }
197+
attributes #3 = { nounwind norecurse }
198+
144199

145200
!llvm.dbg.cu = !{!0}
146201
!llvm.module.flags = !{!2, !3}

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