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changpengDavid Salinas
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[FunctionAttrs] Unconditionally perform argument attribute inference in the first function-attrs pass
Cherry-pick: 90bb50b Fix lit test too Summary: Argument attributes like NoAlias and ReadOnly could affect memoryssa and thus earlyCSE in the function simplification pipeline. https://reviews.llvm.org/D145210 adjusted PostOrderFunctionAttrs placement and caused the argument attributes not referred for the use in the pipeline. This work (initiated by @nikic) unconditionally performs argument attribute inference in the first function-attrs pass. Reviewers: aeubanks and nikic Differential Revision: https://reviews.llvm.org/D156397 Change-Id: If9d1a1b165b708dddc03dfb4d33de2ee48e42844
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9 files changed

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‎clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -307,7 +307,7 @@ void func_single_struct_element_struct_arg(single_struct_element_struct_arg_t ar
307307
// CHECK: void @func_different_size_type_pair_arg(i64 %arg1.coerce0, i32 %arg1.coerce1)
308308
void func_different_size_type_pair_arg(different_size_type_pair arg1) { }
309309

310-
// CHECK: void @func_flexible_array_arg(ptr addrspace(5) nocapture noundef byval(%struct.flexible_array) align 4 %arg)
310+
// CHECK: void @func_flexible_array_arg(ptr addrspace(5) nocapture noundef readnone byval(%struct.flexible_array) align 4 %arg)
311311
void func_flexible_array_arg(flexible_array arg) { }
312312

313313
// CHECK: define{{.*}} float @func_f32_ret()
@@ -445,17 +445,17 @@ flexible_array func_flexible_array_ret()
445445
return s;
446446
}
447447

448-
// CHECK: define{{.*}} void @func_reg_state_lo(<4 x i32> noundef %arg0, <4 x i32> noundef %arg1, <4 x i32> noundef %arg2, i32 noundef %arg3, i32 %s.coerce0, float %s.coerce1, i32 %s.coerce2)
448+
// CHECK: define{{.*}} void @func_reg_state_lo(<4 x i32> noundef %arg0, <4 x i32> noundef %arg1, <4 x i32> noundef %arg2, i32 noundef %arg3, i32 %s.coerce0, float %s.coerce1, i32 %s.coerce2) local_unnamed_addr #1
449449
void func_reg_state_lo(int4 arg0, int4 arg1, int4 arg2, int arg3, struct_arg_t s) { }
450450

451-
// CHECK: define{{.*}} void @func_reg_state_hi(<4 x i32> noundef %arg0, <4 x i32> noundef %arg1, <4 x i32> noundef %arg2, i32 noundef %arg3, i32 noundef %arg4, ptr addrspace(5) nocapture noundef byval(%struct.struct_arg) align 4 %s)
451+
// CHECK: define{{.*}} void @func_reg_state_hi(<4 x i32> noundef %arg0, <4 x i32> noundef %arg1, <4 x i32> noundef %arg2, i32 noundef %arg3, i32 noundef %arg4, ptr addrspace(5) nocapture noundef readnone byval(%struct.struct_arg) align 4 %s)
452452
void func_reg_state_hi(int4 arg0, int4 arg1, int4 arg2, int arg3, int arg4, struct_arg_t s) { }
453453

454454
// XXX - Why don't the inner structs flatten?
455-
// CHECK: define{{.*}} void @func_reg_state_num_regs_nested_struct(<4 x i32> noundef %arg0, i32 noundef %arg1, i32 %arg2.coerce0, %struct.nested %arg2.coerce1, i32 %arg3.coerce0, %struct.nested %arg3.coerce1, ptr addrspace(5) nocapture noundef byval(%struct.num_regs_nested_struct) align 8 %arg4)
455+
// CHECK: define{{.*}} void @func_reg_state_num_regs_nested_struct(<4 x i32> noundef %arg0, i32 noundef %arg1, i32 %arg2.coerce0, %struct.nested %arg2.coerce1, i32 %arg3.coerce0, %struct.nested %arg3.coerce1, ptr addrspace(5) nocapture noundef readnone byval(%struct.num_regs_nested_struct) align 8 %arg4)
456456
void func_reg_state_num_regs_nested_struct(int4 arg0, int arg1, num_regs_nested_struct arg2, num_regs_nested_struct arg3, num_regs_nested_struct arg4) { }
457457

458-
// CHECK: define{{.*}} void @func_double_nested_struct_arg(<4 x i32> noundef %arg0, i32 noundef %arg1, i32 %arg2.coerce0, %struct.double_nested %arg2.coerce1, i16 %arg2.coerce2)
458+
// CHECK: define{{.*}} void @func_double_nested_struct_arg(<4 x i32> noundef %arg0, i32 noundef %arg1, i32 %arg2.coerce0, %struct.double_nested %arg2.coerce1, i16 %arg2.coerce2) local_unnamed_addr #1 {
459459
void func_double_nested_struct_arg(int4 arg0, int arg1, double_nested_struct arg2) { }
460460

461461
// CHECK: define{{.*}} %struct.double_nested_struct @func_double_nested_struct_ret(<4 x i32> noundef %arg0, i32 noundef %arg1)
@@ -477,23 +477,23 @@ void v3i32_reg_count(int3 arg1, int3 arg2, int3 arg3, int3 arg4, struct_arg_t ar
477477

478478
// Function signature from blender, nothing should be passed byval. The v3i32
479479
// should not count as 4 passed registers.
480-
// CHECK: define{{.*}} void @v3i32_pair_reg_count(ptr addrspace(5) nocapture noundef %arg0, <3 x i32> %arg1.coerce0, <3 x i32> %arg1.coerce1, <3 x i32> noundef %arg2, <3 x i32> %arg3.coerce0, <3 x i32> %arg3.coerce1, <3 x i32> noundef %arg4, float noundef %arg5)
480+
// CHECK: define{{.*}} void @v3i32_pair_reg_count(ptr addrspace(5) nocapture noundef readnone %arg0, <3 x i32> %arg1.coerce0, <3 x i32> %arg1.coerce1, <3 x i32> noundef %arg2, <3 x i32> %arg3.coerce0, <3 x i32> %arg3.coerce1, <3 x i32> noundef %arg4, float noundef %arg5)
481481
void v3i32_pair_reg_count(int3_pair *arg0, int3_pair arg1, int3 arg2, int3_pair arg3, int3 arg4, float arg5) { }
482482

483483
// Each short4 should fit pack into 2 registers.
484484
// CHECK: define{{.*}} void @v4i16_reg_count(<4 x i16> noundef %arg0, <4 x i16> noundef %arg1, <4 x i16> noundef %arg2, <4 x i16> noundef %arg3, <4 x i16> noundef %arg4, <4 x i16> noundef %arg5, i32 %arg6.coerce0, i32 %arg6.coerce1, i32 %arg6.coerce2, i32 %arg6.coerce3)
485485
void v4i16_reg_count(short4 arg0, short4 arg1, short4 arg2, short4 arg3,
486486
short4 arg4, short4 arg5, struct_4regs arg6) { }
487487

488-
// CHECK: define{{.*}} void @v4i16_pair_reg_count_over(<4 x i16> noundef %arg0, <4 x i16> noundef %arg1, <4 x i16> noundef %arg2, <4 x i16> noundef %arg3, <4 x i16> noundef %arg4, <4 x i16> noundef %arg5, <4 x i16> noundef %arg6, ptr addrspace(5) nocapture noundef byval(%struct.struct_4regs) align 4 %arg7)
488+
// CHECK: define{{.*}} void @v4i16_pair_reg_count_over(<4 x i16> noundef %arg0, <4 x i16> noundef %arg1, <4 x i16> noundef %arg2, <4 x i16> noundef %arg3, <4 x i16> noundef %arg4, <4 x i16> noundef %arg5, <4 x i16> noundef %arg6, ptr addrspace(5) nocapture noundef readnone byval(%struct.struct_4regs) align 4 %arg7)
489489
void v4i16_pair_reg_count_over(short4 arg0, short4 arg1, short4 arg2, short4 arg3,
490490
short4 arg4, short4 arg5, short4 arg6, struct_4regs arg7) { }
491491

492492
// CHECK: define{{.*}} void @v3i16_reg_count(<3 x i16> noundef %arg0, <3 x i16> noundef %arg1, <3 x i16> noundef %arg2, <3 x i16> noundef %arg3, <3 x i16> noundef %arg4, <3 x i16> noundef %arg5, i32 %arg6.coerce0, i32 %arg6.coerce1, i32 %arg6.coerce2, i32 %arg6.coerce3)
493493
void v3i16_reg_count(short3 arg0, short3 arg1, short3 arg2, short3 arg3,
494494
short3 arg4, short3 arg5, struct_4regs arg6) { }
495495

496-
// CHECK: define{{.*}} void @v3i16_reg_count_over(<3 x i16> noundef %arg0, <3 x i16> noundef %arg1, <3 x i16> noundef %arg2, <3 x i16> noundef %arg3, <3 x i16> noundef %arg4, <3 x i16> noundef %arg5, <3 x i16> noundef %arg6, ptr addrspace(5) nocapture noundef byval(%struct.struct_4regs) align 4 %arg7)
496+
// CHECK: define{{.*}} void @v3i16_reg_count_over(<3 x i16> noundef %arg0, <3 x i16> noundef %arg1, <3 x i16> noundef %arg2, <3 x i16> noundef %arg3, <3 x i16> noundef %arg4, <3 x i16> noundef %arg5, <3 x i16> noundef %arg6, ptr addrspace(5) nocapture noundef readnone byval(%struct.struct_4regs) align 4 %arg7)
497497
void v3i16_reg_count_over(short3 arg0, short3 arg1, short3 arg2, short3 arg3,
498498
short3 arg4, short3 arg5, short3 arg6, struct_4regs arg7) { }
499499

@@ -503,7 +503,7 @@ void v2i16_reg_count(short2 arg0, short2 arg1, short2 arg2, short2 arg3,
503503
short2 arg8, short2 arg9, short2 arg10, short2 arg11,
504504
struct_4regs arg13) { }
505505

506-
// CHECK: define{{.*}} void @v2i16_reg_count_over(<2 x i16> noundef %arg0, <2 x i16> noundef %arg1, <2 x i16> noundef %arg2, <2 x i16> noundef %arg3, <2 x i16> noundef %arg4, <2 x i16> noundef %arg5, <2 x i16> noundef %arg6, <2 x i16> noundef %arg7, <2 x i16> noundef %arg8, <2 x i16> noundef %arg9, <2 x i16> noundef %arg10, <2 x i16> noundef %arg11, <2 x i16> noundef %arg12, ptr addrspace(5) nocapture noundef byval(%struct.struct_4regs) align 4 %arg13)
506+
// CHECK: define{{.*}} void @v2i16_reg_count_over(<2 x i16> noundef %arg0, <2 x i16> noundef %arg1, <2 x i16> noundef %arg2, <2 x i16> noundef %arg3, <2 x i16> noundef %arg4, <2 x i16> noundef %arg5, <2 x i16> noundef %arg6, <2 x i16> noundef %arg7, <2 x i16> noundef %arg8, <2 x i16> noundef %arg9, <2 x i16> noundef %arg10, <2 x i16> noundef %arg11, <2 x i16> noundef %arg12, ptr addrspace(5) nocapture noundef readnone byval(%struct.struct_4regs) align 4 %arg13)
507507
void v2i16_reg_count_over(short2 arg0, short2 arg1, short2 arg2, short2 arg3,
508508
short2 arg4, short2 arg5, short2 arg6, short2 arg7,
509509
short2 arg8, short2 arg9, short2 arg10, short2 arg11,
@@ -513,7 +513,7 @@ void v2i16_reg_count_over(short2 arg0, short2 arg1, short2 arg2, short2 arg3,
513513
void v2i8_reg_count(char2 arg0, char2 arg1, char2 arg2, char2 arg3,
514514
char2 arg4, char2 arg5, struct_4regs arg6) { }
515515

516-
// CHECK: define{{.*}} void @v2i8_reg_count_over(<2 x i8> noundef %arg0, <2 x i8> noundef %arg1, <2 x i8> noundef %arg2, <2 x i8> noundef %arg3, <2 x i8> noundef %arg4, <2 x i8> noundef %arg5, i32 noundef %arg6, ptr addrspace(5) nocapture noundef byval(%struct.struct_4regs) align 4 %arg7)
516+
// CHECK: define{{.*}} void @v2i8_reg_count_over(<2 x i8> noundef %arg0, <2 x i8> noundef %arg1, <2 x i8> noundef %arg2, <2 x i8> noundef %arg3, <2 x i8> noundef %arg4, <2 x i8> noundef %arg5, i32 noundef %arg6, ptr addrspace(5) nocapture noundef readnone byval(%struct.struct_4regs) align 4 %arg7)
517517
void v2i8_reg_count_over(char2 arg0, char2 arg1, char2 arg2, char2 arg3,
518518
char2 arg4, char2 arg5, int arg6, struct_4regs arg7) { }
519519

‎clang/test/CodeGenOpenCL/kernel-param-alignment.cl

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -17,10 +17,10 @@ kernel void test(
1717
global void *v,
1818
global struct packed *p) {
1919
// CHECK-LABEL: spir_kernel void @test(
20-
// CHECK-SAME: ptr nocapture noundef align 4 %i32,
21-
// CHECK-SAME: ptr nocapture noundef align 8 %i64,
22-
// CHECK-SAME: ptr nocapture noundef align 16 %v4i32,
23-
// CHECK-SAME: ptr nocapture noundef align 8 %v2f32,
24-
// CHECK-SAME: ptr nocapture noundef %v,
25-
// CHECK-SAME: ptr nocapture noundef align 1 %p)
20+
// CHECK-SAME: ptr nocapture noundef readnone align 4 %i32,
21+
// CHECK-SAME: ptr nocapture noundef readnone align 8 %i64,
22+
// CHECK-SAME: ptr nocapture noundef readnone align 16 %v4i32,
23+
// CHECK-SAME: ptr nocapture noundef readnone align 8 %v2f32,
24+
// CHECK-SAME: ptr nocapture noundef readnone %v,
25+
// CHECK-SAME: ptr nocapture noundef readnone align 1 %p)
2626
}

‎llvm/lib/Passes/PassBuilder.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -793,7 +793,7 @@ Expected<bool> parseCoroSplitPassOptions(StringRef Params) {
793793
}
794794

795795
Expected<bool> parsePostOrderFunctionAttrsPassOptions(StringRef Params) {
796-
return parseSinglePassOption(Params, "skip-non-recursive",
796+
return parseSinglePassOption(Params, "skip-non-recursive-function-attrs",
797797
"PostOrderFunctionAttrs");
798798
}
799799

‎llvm/lib/Passes/PassRegistry.def

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -213,7 +213,7 @@ CGSCC_PASS_WITH_PARAMS("function-attrs",
213213
return PostOrderFunctionAttrsPass(SkipNonRecursive);
214214
},
215215
parsePostOrderFunctionAttrsPassOptions,
216-
"skip-non-recursive")
216+
"skip-non-recursive-function-attrs")
217217
#undef CGSCC_PASS_WITH_PARAMS
218218

219219
#ifndef FUNCTION_ANALYSIS

‎llvm/lib/Transforms/IPO/FunctionAttrs.cpp

Lines changed: 13 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1722,14 +1722,19 @@ static SCCNodesResult createSCCNodeSet(ArrayRef<Function *> Functions) {
17221722

17231723
template <typename AARGetterT>
17241724
static SmallSet<Function *, 8>
1725-
deriveAttrsInPostOrder(ArrayRef<Function *> Functions, AARGetterT &&AARGetter) {
1725+
deriveAttrsInPostOrder(ArrayRef<Function *> Functions, AARGetterT &&AARGetter,
1726+
bool ArgAttrsOnly) {
17261727
SCCNodesResult Nodes = createSCCNodeSet(Functions);
17271728

17281729
// Bail if the SCC only contains optnone functions.
17291730
if (Nodes.SCCNodes.empty())
17301731
return {};
17311732

17321733
SmallSet<Function *, 8> Changed;
1734+
if (ArgAttrsOnly) {
1735+
addArgumentAttrs(Nodes.SCCNodes, Changed);
1736+
return Changed;
1737+
}
17331738

17341739
addArgumentReturnedAttrs(Nodes.SCCNodes, Changed);
17351740
addMemoryAttrs(Nodes.SCCNodes, AARGetter, Changed);
@@ -1764,10 +1769,13 @@ PreservedAnalyses PostOrderFunctionAttrsPass::run(LazyCallGraph::SCC &C,
17641769
LazyCallGraph &CG,
17651770
CGSCCUpdateResult &) {
17661771
// Skip non-recursive functions if requested.
1772+
// Only infer argument attributes for non-recursive functions, because
1773+
// it can affect optimization behavior in conjunction with noalias.
1774+
bool ArgAttrsOnly = false;
17671775
if (C.size() == 1 && SkipNonRecursive) {
17681776
LazyCallGraph::Node &N = *C.begin();
17691777
if (!N->lookup(N))
1770-
return PreservedAnalyses::all();
1778+
ArgAttrsOnly = true;
17711779
}
17721780

17731781
FunctionAnalysisManager &FAM =
@@ -1784,7 +1792,8 @@ PreservedAnalyses PostOrderFunctionAttrsPass::run(LazyCallGraph::SCC &C,
17841792
Functions.push_back(&N.getFunction());
17851793
}
17861794

1787-
auto ChangedFunctions = deriveAttrsInPostOrder(Functions, AARGetter);
1795+
auto ChangedFunctions =
1796+
deriveAttrsInPostOrder(Functions, AARGetter, ArgAttrsOnly);
17881797
if (ChangedFunctions.empty())
17891798
return PreservedAnalyses::all();
17901799

@@ -1820,7 +1829,7 @@ void PostOrderFunctionAttrsPass::printPipeline(
18201829
static_cast<PassInfoMixin<PostOrderFunctionAttrsPass> *>(this)->printPipeline(
18211830
OS, MapClassName2PassName);
18221831
if (SkipNonRecursive)
1823-
OS << "<skip-non-recursive>";
1832+
OS << "<skip-non-recursive-function-attrs>";
18241833
}
18251834

18261835
template <typename AARGetterT>

‎llvm/test/Other/new-pm-print-pipeline.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -99,8 +99,8 @@
9999
; CHECK-28: function(instcombine<max-iterations=1000;no-use-loop-info>,instcombine<max-iterations=42;use-loop-info>)
100100

101101
;; Test function-attrs
102-
; RUN: opt -disable-output -disable-verify -print-pipeline-passes -passes='cgscc(function-attrs<skip-non-recursive>)' < %s | FileCheck %s --match-full-lines --check-prefixes=CHECK-29
103-
; CHECK-29: cgscc(function-attrs<skip-non-recursive>)
102+
; RUN: opt -disable-output -disable-verify -print-pipeline-passes -passes='cgscc(function-attrs<skip-non-recursive-function-attrs>)' < %s | FileCheck %s --match-full-lines --check-prefixes=CHECK-29
103+
; CHECK-29: cgscc(function-attrs<skip-non-recursive-function-attrs>)
104104

105105
;; Test cgscc -> function adaptor
106106
; RUN: opt -disable-output -disable-verify -print-pipeline-passes -passes='cgscc(function<eager-inv;no-rerun>(no-op-function))' < %s | FileCheck %s --match-full-lines --check-prefixes=CHECK-30

‎llvm/test/Transforms/InstCombine/unused-nonnull.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@ target triple = "x86_64-unknown-linux-gnu"
99

1010
define i32 @main(i32 %argc, ptr %argv) #0 {
1111
; CHECK-LABEL: define {{[^@]+}}@main
12-
; CHECK-SAME: (i32 [[ARGC:%.*]], ptr nocapture readnone [[ARGV:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
12+
; CHECK-SAME: (i32 [[ARGC:%.*]], ptr nocapture readonly [[ARGV:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
1313
; CHECK-NEXT: entry:
1414
; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[ARGC]], 2
1515
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TMP0]], i32 0, i32 [[ARGC]]

‎llvm/test/Transforms/PhaseOrdering/early-arg-attrs-inference.ll

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,27 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
2+
; RUN: opt -S -O3 -memssa-check-limit=1 -memdep-block-scan-limit=1 < %s | FileCheck %s
3+
4+
define i32 @f(ptr noalias %p, i32 %c) {
5+
; CHECK-LABEL: define i32 @f
6+
; CHECK-SAME: (ptr noalias nocapture readonly [[P:%.*]], i32 [[C:%.*]]) local_unnamed_addr {
7+
; CHECK-NEXT: tail call void @g()
8+
; CHECK-NEXT: tail call void @g()
9+
; CHECK-NEXT: tail call void @g()
10+
; CHECK-NEXT: tail call void @g()
11+
; CHECK-NEXT: tail call void @g()
12+
; CHECK-NEXT: tail call void @g()
13+
; CHECK-NEXT: ret i32 0
14+
;
15+
%i = load i32, ptr %p
16+
call void @g()
17+
call void @g()
18+
call void @g()
19+
call void @g()
20+
call void @g()
21+
call void @g()
22+
%i2 = load i32, ptr %p
23+
%r = sub i32 %i, %i2
24+
ret i32 %r
25+
}
26+
27+
declare void @g()

‎revert_patches.txt

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
SROA breaks MIOpen
2+
Revert "[SROA] Create additional vector type candidates based on store and load slices"
3+
Revert "[SROA] Fix bug where CandidateTys is appended while being iterated"
4+
5+
Rana: HipCatch2 and olcTest conformance fails
6+
Revert "[AMDGPU] __builtin_amdgcn_read_exec_* should be implemented with llvm.amdgcn.ballot"
7+
8+
missing executable in build:
9+
Revert "[RemarkUtil] Refactor llvm-remarkutil to include size-diff "
10+
11+
Johannes: breakage
12+
Revert "[OpenMP] Disable early vectorization of loads/stores in the runtime "
13+
asserts in snap and MI-Teams
14+
15+
Nicole and Saiyed:
16+
Revert " [OpenMP][DeviceRTL][AMDGPU] Support code object version 5"
17+
18+
Revert "[Parser] Parse string literal arguments of 'avail"
19+

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