@@ -692,7 +692,6 @@ void ErrorNonSelfAMDGPU::PrintStack() {
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symbolizer.SymbolizePC (callstack[0 ] - cb_loc.vma_adjust , source_location);
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// release all allocated comgr objects.
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symbolizer.Release ();
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- CloseFile ((fd_t )cb_loc.fd );
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}
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#endif
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Printf (" %s" , source_location.data ());
@@ -714,18 +713,80 @@ void ErrorNonSelfAMDGPU::PrintThreadsAndAddresses() {
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Printf (" %s\n " , str.data ());
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}
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+ static uptr ScanForMagicDown (uptr start, uptr lo, uptr magic0, uptr magic1) {
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+ for (uptr p = start; p >= lo; p -= sizeof (uptr)) {
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+ if (((uptr*)p)[0 ] == magic0 && ((uptr*)p)[1 ] == magic1)
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+ return p;
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+ }
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+ return 0 ;
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+ }
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+
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+ static uptr ScanForMagicUp (uptr start, uptr hi, uptr magic0, uptr magic1) {
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+ for (uptr p = start; p < hi; p += sizeof (uptr)) {
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+ if (((uptr*)p)[0 ] == magic0 && ((uptr*)p)[1 ] == magic1)
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+ return p;
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+ }
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+ return 0 ;
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+ }
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+
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+ void ErrorNonSelfAMDGPU::PrintMallocStack () {
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+ // Facts about asan malloc on device
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+ const uptr magic = 0xfedcba1ee1abcdefULL ;
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+ const uptr offset = 32 ;
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+ const uptr min_chunk_size = 96 ;
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+ const uptr min_alloc_size = 48 ;
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+
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+ Decorator d;
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+ HeapAddressDescription addr_description;
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+
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+ if (GetHeapAddressInformation (device_address[0 ], access_size,
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+ &addr_description) &&
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+ addr_description.chunk_access .chunk_size >= min_chunk_size) {
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+ uptr lo = addr_description.chunk_access .chunk_begin ;
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+ uptr hi = lo + addr_description.chunk_access .chunk_size - min_alloc_size;
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+ uptr start = RoundDownTo (device_address[0 ], sizeof (uptr));
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+
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+ uptr plo = ScanForMagicDown (start, lo, magic, lo);
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+ if (plo) {
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+ callstack[0 ] = ((uptr*)plo)[2 ];
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+ Printf (" %s%p is %u bytes above an address from a %sdevice malloc "
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+ " (or free) call of size %u from%s\n " ,
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+ d.Location (), device_address[0 ],
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+ (int )(device_address[0 ] - (plo+offset)),
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+ d.Allocation (), ((int *)plo)[7 ], d.Default ());
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+ PrintStack ();
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+ }
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+
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+ uptr phi = ScanForMagicUp (start, hi, magic, lo);
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+ if (phi) {
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+ callstack[0 ] = ((uptr*)phi)[2 ];
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+ Printf (" %s%p is %u bytes below an address from a %sdevice malloc "
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+ " (or free) call of size %u from%s\n " ,
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+ d.Location (), device_address[0 ],
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+ (int )((phi+offset) - device_address[0 ]),
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+
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+ d.Allocation (), ((int *)phi)[7 ], d.Default ());
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+ PrintStack ();
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+ }
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+ }
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+ }
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+
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void ErrorNonSelfAMDGPU::Print () {
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Decorator d;
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Printf (" %s" , d.Error ());
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Report (" ERROR: AddressSanitizer: %s on amdgpu device %zu at pc %p\n " ,
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bug_descr, device_id, callstack[0 ]);
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- Printf (" %s" , d.Default ());
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Printf (" %s%s of size %zu in workgroup id (%zu,%zu,%zu)\n " , d.Access (),
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(is_write ? " WRITE" : " READ" ), access_size, wg.idx , wg.idy , wg.idz );
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Printf (" %s" , d.Default ());
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PrintStack ();
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Printf (" %s" , d.Location ());
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PrintThreadsAndAddresses ();
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+ Printf (" %s" , d.Default ());
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+ if (shadow_val == kAsanHeapFreeMagic ||
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+ shadow_val == kAsanHeapLeftRedzoneMagic ) {
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+ PrintMallocStack ();
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+ }
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addr_description.Print (bug_descr, true );
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Printf (" %s" , d.Default ());
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// print shadow memory region for single address
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