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[AArch64] Convert some tests to opaque pointers (NFC)
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‎llvm/test/CodeGen/AArch64/128bit_load_store.ll

Lines changed: 15 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1,53 +1,49 @@
11
; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=neon | FileCheck %s
22

3-
define void @test_store_f128(fp128* %ptr, fp128 %val) #0 {
3+
define void @test_store_f128(ptr %ptr, fp128 %val) #0 {
44
; CHECK-LABEL: test_store_f128
55
; CHECK: str {{q[0-9]+}}, [{{x[0-9]+}}]
66
entry:
7-
store fp128 %val, fp128* %ptr, align 16
7+
store fp128 %val, ptr %ptr, align 16
88
ret void
99
}
1010

11-
define fp128 @test_load_f128(fp128* readonly %ptr) #2 {
11+
define fp128 @test_load_f128(ptr readonly %ptr) #2 {
1212
; CHECK-LABEL: test_load_f128
1313
; CHECK: ldr {{q[0-9]+}}, [{{x[0-9]+}}]
1414
entry:
15-
%0 = load fp128, fp128* %ptr, align 16
15+
%0 = load fp128, ptr %ptr, align 16
1616
ret fp128 %0
1717
}
1818

19-
define void @test_vstrq_p128(i128* %ptr, i128 %val) #0 {
19+
define void @test_vstrq_p128(ptr %ptr, i128 %val) #0 {
2020
; CHECK-LABEL: test_vstrq_p128
2121
; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [{{x[0-9]+}}]
2222

2323
entry:
24-
%0 = bitcast i128* %ptr to fp128*
25-
%1 = bitcast i128 %val to fp128
26-
store fp128 %1, fp128* %0, align 16
24+
%0 = bitcast i128 %val to fp128
25+
store fp128 %0, ptr %ptr, align 16
2726
ret void
2827
}
2928

30-
define i128 @test_vldrq_p128(i128* readonly %ptr) #2 {
29+
define i128 @test_vldrq_p128(ptr readonly %ptr) #2 {
3130
; CHECK-LABEL: test_vldrq_p128
3231
; CHECK: ldp {{x[0-9]+}}, {{x[0-9]+}}, [{{x[0-9]+}}]
3332

3433
entry:
35-
%0 = bitcast i128* %ptr to fp128*
36-
%1 = load fp128, fp128* %0, align 16
37-
%2 = bitcast fp128 %1 to i128
38-
ret i128 %2
34+
%0 = load fp128, ptr %ptr, align 16
35+
%1 = bitcast fp128 %0 to i128
36+
ret i128 %1
3937
}
4038

41-
define void @test_ld_st_p128(i128* nocapture %ptr) #0 {
39+
define void @test_ld_st_p128(ptr nocapture %ptr) #0 {
4240
; CHECK-LABEL: test_ld_st_p128
4341
; CHECK: ldr {{q[0-9]+}}, [{{x[0-9]+}}]
4442
; CHECK-NEXT: str {{q[0-9]+}}, [{{x[0-9]+}}, #16]
4543
entry:
46-
%0 = bitcast i128* %ptr to fp128*
47-
%1 = load fp128, fp128* %0, align 16
48-
%add.ptr = getelementptr inbounds i128, i128* %ptr, i64 1
49-
%2 = bitcast i128* %add.ptr to fp128*
50-
store fp128 %1, fp128* %2, align 16
44+
%0 = load fp128, ptr %ptr, align 16
45+
%add.ptr = getelementptr inbounds i128, ptr %ptr, i64 1
46+
store fp128 %0, ptr %add.ptr, align 16
5147
ret void
5248
}
5349

‎llvm/test/CodeGen/AArch64/2s-complement-asm.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,6 @@
44
; CHECK: 0000002a 59ed145d
55
@other = global i32 42
66
@var = global i32 sub(i32 646102975,
7-
i32 add (i32 trunc(i64 sub(i64 ptrtoint(i32* @var to i64),
8-
i64 ptrtoint(i32* @other to i64)) to i32),
7+
i32 add (i32 trunc(i64 sub(i64 ptrtoint(ptr @var to i64),
8+
i64 ptrtoint(ptr @other to i64)) to i32),
99
i32 3432360802))

‎llvm/test/CodeGen/AArch64/GlobalISel/invoke-region.ll

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ declare void @may_throw()
77

88
; This test checks that the widened G_CONSTANT operand to the phi in "continue" bb
99
; is placed before the potentially throwing call in the entry block.
10-
define i1 @test_lpad_phi_widen_into_pred() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
10+
define i1 @test_lpad_phi_widen_into_pred() personality ptr @__gxx_personality_v0 {
1111
; CHECK-LABEL: name: test_lpad_phi_widen_into_pred
1212
; CHECK: bb.1 (%ir-block.0):
1313
; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.2(0x40000000)
@@ -42,15 +42,15 @@ define i1 @test_lpad_phi_widen_into_pred() personality i8* bitcast (i32 (...)* @
4242
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C4]]
4343
; CHECK-NEXT: $w0 = COPY [[AND]](s32)
4444
; CHECK-NEXT: RET_ReallyLR implicit $w0
45-
store i32 42, i32* @global_var
45+
store i32 42, ptr @global_var
4646
invoke void @may_throw()
4747
to label %continue unwind label %lpad
4848

4949
lpad: ; preds = %entry
5050
%p = phi i32 [ 11, %0 ]
51-
%1 = landingpad { i8*, i32 }
52-
catch i8* null
53-
store i32 %p, i32* @global_var
51+
%1 = landingpad { ptr, i32 }
52+
catch ptr null
53+
store i32 %p, ptr @global_var
5454
br label %continue
5555

5656
continue: ; preds = %entry, %lpad
@@ -59,7 +59,7 @@ continue: ; preds = %entry, %lpad
5959
}
6060

6161
; Same test but with extensions.
62-
define i1 @test_lpad_phi_widen_into_pred_ext(i1 *%ptr) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
62+
define i1 @test_lpad_phi_widen_into_pred_ext(ptr %ptr) personality ptr @__gxx_personality_v0 {
6363
; CHECK-LABEL: name: test_lpad_phi_widen_into_pred_ext
6464
; CHECK: bb.1 (%ir-block.0):
6565
; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.2(0x40000000)
@@ -98,16 +98,16 @@ define i1 @test_lpad_phi_widen_into_pred_ext(i1 *%ptr) personality i8* bitcast (
9898
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT1]], [[C3]]
9999
; CHECK-NEXT: $w0 = COPY [[AND]](s32)
100100
; CHECK-NEXT: RET_ReallyLR implicit $w0
101-
store i32 42, i32* @global_var
102-
%v = load i1, i1* %ptr
101+
store i32 42, ptr @global_var
102+
%v = load i1, ptr %ptr
103103
invoke void @may_throw()
104104
to label %continue unwind label %lpad
105105

106106
lpad: ; preds = %entry
107107
%p = phi i32 [ 11, %0 ]
108-
%1 = landingpad { i8*, i32 }
109-
catch i8* null
110-
store i32 %p, i32* @global_var
108+
%1 = landingpad { ptr, i32 }
109+
catch ptr null
110+
store i32 %p, ptr @global_var
111111
br label %continue
112112

113113
continue: ; preds = %entry, %lpad

‎llvm/test/CodeGen/AArch64/PBQP-chain.ll

Lines changed: 48 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -20,85 +20,85 @@ target triple = "aarch64"
2020
; CHECK-ODD: fmadd {{d[0-9]*[13579]}}, {{d[0-9]*}}, {{d[0-9]*}}, {{d[0-9]*[13579]}}
2121
; CHECK-ODD: fmadd {{d[0-9]*[13579]}}, {{d[0-9]*}}, {{d[0-9]*}}, {{d[0-9]*[13579]}}
2222
; CHECK-ODD: fmadd {{d[0-9]*[13579]}}, {{d[0-9]*}}, {{d[0-9]*}}, {{d[0-9]*[13579]}}
23-
define void @fir(double* nocapture %rx, double* nocapture %ry, double* nocapture %c, double* nocapture %x, double* nocapture %y) {
23+
define void @fir(ptr nocapture %rx, ptr nocapture %ry, ptr nocapture %c, ptr nocapture %x, ptr nocapture %y) {
2424
entry:
25-
%0 = load double, double* %c, align 8
26-
%1 = load double, double* %x, align 8
25+
%0 = load double, ptr %c, align 8
26+
%1 = load double, ptr %x, align 8
2727
%mul = fmul fast double %1, %0
28-
%2 = load double, double* %y, align 8
28+
%2 = load double, ptr %y, align 8
2929
%mul7 = fmul fast double %2, %0
30-
%arrayidx.1 = getelementptr inbounds double, double* %c, i64 1
31-
%3 = load double, double* %arrayidx.1, align 8
32-
%arrayidx2.1 = getelementptr inbounds double, double* %x, i64 1
33-
%4 = load double, double* %arrayidx2.1, align 8
30+
%arrayidx.1 = getelementptr inbounds double, ptr %c, i64 1
31+
%3 = load double, ptr %arrayidx.1, align 8
32+
%arrayidx2.1 = getelementptr inbounds double, ptr %x, i64 1
33+
%4 = load double, ptr %arrayidx2.1, align 8
3434
%mul.1 = fmul fast double %4, %3
3535
%add.1 = fadd fast double %mul.1, %mul
36-
%arrayidx6.1 = getelementptr inbounds double, double* %y, i64 1
37-
%5 = load double, double* %arrayidx6.1, align 8
36+
%arrayidx6.1 = getelementptr inbounds double, ptr %y, i64 1
37+
%5 = load double, ptr %arrayidx6.1, align 8
3838
%mul7.1 = fmul fast double %5, %3
3939
%add8.1 = fadd fast double %mul7.1, %mul7
40-
%arrayidx.2 = getelementptr inbounds double, double* %c, i64 2
41-
%6 = load double, double* %arrayidx.2, align 8
42-
%arrayidx2.2 = getelementptr inbounds double, double* %x, i64 2
43-
%7 = load double, double* %arrayidx2.2, align 8
40+
%arrayidx.2 = getelementptr inbounds double, ptr %c, i64 2
41+
%6 = load double, ptr %arrayidx.2, align 8
42+
%arrayidx2.2 = getelementptr inbounds double, ptr %x, i64 2
43+
%7 = load double, ptr %arrayidx2.2, align 8
4444
%mul.2 = fmul fast double %7, %6
4545
%add.2 = fadd fast double %mul.2, %add.1
46-
%arrayidx6.2 = getelementptr inbounds double, double* %y, i64 2
47-
%8 = load double, double* %arrayidx6.2, align 8
46+
%arrayidx6.2 = getelementptr inbounds double, ptr %y, i64 2
47+
%8 = load double, ptr %arrayidx6.2, align 8
4848
%mul7.2 = fmul fast double %8, %6
4949
%add8.2 = fadd fast double %mul7.2, %add8.1
50-
%arrayidx.3 = getelementptr inbounds double, double* %c, i64 3
51-
%9 = load double, double* %arrayidx.3, align 8
52-
%arrayidx2.3 = getelementptr inbounds double, double* %x, i64 3
53-
%10 = load double, double* %arrayidx2.3, align 8
50+
%arrayidx.3 = getelementptr inbounds double, ptr %c, i64 3
51+
%9 = load double, ptr %arrayidx.3, align 8
52+
%arrayidx2.3 = getelementptr inbounds double, ptr %x, i64 3
53+
%10 = load double, ptr %arrayidx2.3, align 8
5454
%mul.3 = fmul fast double %10, %9
5555
%add.3 = fadd fast double %mul.3, %add.2
56-
%arrayidx6.3 = getelementptr inbounds double, double* %y, i64 3
57-
%11 = load double, double* %arrayidx6.3, align 8
56+
%arrayidx6.3 = getelementptr inbounds double, ptr %y, i64 3
57+
%11 = load double, ptr %arrayidx6.3, align 8
5858
%mul7.3 = fmul fast double %11, %9
5959
%add8.3 = fadd fast double %mul7.3, %add8.2
60-
%arrayidx.4 = getelementptr inbounds double, double* %c, i64 4
61-
%12 = load double, double* %arrayidx.4, align 8
62-
%arrayidx2.4 = getelementptr inbounds double, double* %x, i64 4
63-
%13 = load double, double* %arrayidx2.4, align 8
60+
%arrayidx.4 = getelementptr inbounds double, ptr %c, i64 4
61+
%12 = load double, ptr %arrayidx.4, align 8
62+
%arrayidx2.4 = getelementptr inbounds double, ptr %x, i64 4
63+
%13 = load double, ptr %arrayidx2.4, align 8
6464
%mul.4 = fmul fast double %13, %12
6565
%add.4 = fadd fast double %mul.4, %add.3
66-
%arrayidx6.4 = getelementptr inbounds double, double* %y, i64 4
67-
%14 = load double, double* %arrayidx6.4, align 8
66+
%arrayidx6.4 = getelementptr inbounds double, ptr %y, i64 4
67+
%14 = load double, ptr %arrayidx6.4, align 8
6868
%mul7.4 = fmul fast double %14, %12
6969
%add8.4 = fadd fast double %mul7.4, %add8.3
70-
%arrayidx.5 = getelementptr inbounds double, double* %c, i64 5
71-
%15 = load double, double* %arrayidx.5, align 8
72-
%arrayidx2.5 = getelementptr inbounds double, double* %x, i64 5
73-
%16 = load double, double* %arrayidx2.5, align 8
70+
%arrayidx.5 = getelementptr inbounds double, ptr %c, i64 5
71+
%15 = load double, ptr %arrayidx.5, align 8
72+
%arrayidx2.5 = getelementptr inbounds double, ptr %x, i64 5
73+
%16 = load double, ptr %arrayidx2.5, align 8
7474
%mul.5 = fmul fast double %16, %15
7575
%add.5 = fadd fast double %mul.5, %add.4
76-
%arrayidx6.5 = getelementptr inbounds double, double* %y, i64 5
77-
%17 = load double, double* %arrayidx6.5, align 8
76+
%arrayidx6.5 = getelementptr inbounds double, ptr %y, i64 5
77+
%17 = load double, ptr %arrayidx6.5, align 8
7878
%mul7.5 = fmul fast double %17, %15
7979
%add8.5 = fadd fast double %mul7.5, %add8.4
80-
%arrayidx.6 = getelementptr inbounds double, double* %c, i64 6
81-
%18 = load double, double* %arrayidx.6, align 8
82-
%arrayidx2.6 = getelementptr inbounds double, double* %x, i64 6
83-
%19 = load double, double* %arrayidx2.6, align 8
80+
%arrayidx.6 = getelementptr inbounds double, ptr %c, i64 6
81+
%18 = load double, ptr %arrayidx.6, align 8
82+
%arrayidx2.6 = getelementptr inbounds double, ptr %x, i64 6
83+
%19 = load double, ptr %arrayidx2.6, align 8
8484
%mul.6 = fmul fast double %19, %18
8585
%add.6 = fadd fast double %mul.6, %add.5
86-
%arrayidx6.6 = getelementptr inbounds double, double* %y, i64 6
87-
%20 = load double, double* %arrayidx6.6, align 8
86+
%arrayidx6.6 = getelementptr inbounds double, ptr %y, i64 6
87+
%20 = load double, ptr %arrayidx6.6, align 8
8888
%mul7.6 = fmul fast double %20, %18
8989
%add8.6 = fadd fast double %mul7.6, %add8.5
90-
%arrayidx.7 = getelementptr inbounds double, double* %c, i64 7
91-
%21 = load double, double* %arrayidx.7, align 8
92-
%arrayidx2.7 = getelementptr inbounds double, double* %x, i64 7
93-
%22 = load double, double* %arrayidx2.7, align 8
90+
%arrayidx.7 = getelementptr inbounds double, ptr %c, i64 7
91+
%21 = load double, ptr %arrayidx.7, align 8
92+
%arrayidx2.7 = getelementptr inbounds double, ptr %x, i64 7
93+
%22 = load double, ptr %arrayidx2.7, align 8
9494
%mul.7 = fmul fast double %22, %21
9595
%add.7 = fadd fast double %mul.7, %add.6
96-
%arrayidx6.7 = getelementptr inbounds double, double* %y, i64 7
97-
%23 = load double, double* %arrayidx6.7, align 8
96+
%arrayidx6.7 = getelementptr inbounds double, ptr %y, i64 7
97+
%23 = load double, ptr %arrayidx6.7, align 8
9898
%mul7.7 = fmul fast double %23, %21
9999
%add8.7 = fadd fast double %mul7.7, %add8.6
100-
store double %add.7, double* %rx, align 8
101-
store double %add8.7, double* %ry, align 8
100+
store double %add.7, ptr %rx, align 8
101+
store double %add8.7, ptr %ry, align 8
102102
ret void
103103
}
104104

‎llvm/test/CodeGen/AArch64/PBQP-coalesce-benefit.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,13 +1,13 @@
11
; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mcpu=cortex-a57 -mattr=+neon -fp-contract=fast -regalloc=pbqp -pbqp-coalescing | FileCheck %s
22

33
; CHECK-LABEL: test:
4-
define i32 @test(i32 %acc, i32* nocapture readonly %c) {
4+
define i32 @test(i32 %acc, ptr nocapture readonly %c) {
55
entry:
6-
%0 = load i32, i32* %c, align 4
6+
%0 = load i32, ptr %c, align 4
77
; CHECK-NOT: mov w{{[0-9]*}}, w0
88
%add = add nsw i32 %0, %acc
9-
%arrayidx1 = getelementptr inbounds i32, i32* %c, i64 1
10-
%1 = load i32, i32* %arrayidx1, align 4
9+
%arrayidx1 = getelementptr inbounds i32, ptr %c, i64 1
10+
%1 = load i32, ptr %arrayidx1, align 4
1111
%add2 = add nsw i32 %add, %1
1212
ret i32 %add2
1313
}

‎llvm/test/CodeGen/AArch64/Redundantstore.ll

Lines changed: 8 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1,25 +1,23 @@
11
; RUN: llc < %s -O3 -mtriple=aarch64-eabi | FileCheck %s
22

33
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
4-
@end_of_array = common global i8* null, align 8
4+
@end_of_array = common global ptr null, align 8
55

66
; CHECK-LABEL: @test
77
; CHECK: stur
88
; CHECK-NOT: stur
9-
define i8* @test(i32 %size) {
9+
define ptr @test(i32 %size) {
1010
entry:
11-
%0 = load i8*, i8** @end_of_array, align 8
11+
%0 = load ptr, ptr @end_of_array, align 8
1212
%conv = sext i32 %size to i64
1313
%and = and i64 %conv, -8
1414
%conv2 = trunc i64 %and to i32
1515
%add.ptr.sum = add nsw i64 %and, -4
16-
%add.ptr3 = getelementptr inbounds i8, i8* %0, i64 %add.ptr.sum
17-
%size4 = bitcast i8* %add.ptr3 to i32*
18-
store i32 %conv2, i32* %size4, align 4
16+
%add.ptr3 = getelementptr inbounds i8, ptr %0, i64 %add.ptr.sum
17+
store i32 %conv2, ptr %add.ptr3, align 4
1918
%add.ptr.sum9 = add nsw i64 %and, -4
20-
%add.ptr5 = getelementptr inbounds i8, i8* %0, i64 %add.ptr.sum9
21-
%size6 = bitcast i8* %add.ptr5 to i32*
22-
store i32 %conv2, i32* %size6, align 4
23-
ret i8* %0
19+
%add.ptr5 = getelementptr inbounds i8, ptr %0, i64 %add.ptr.sum9
20+
store i32 %conv2, ptr %add.ptr5, align 4
21+
ret ptr %0
2422
}
2523

‎llvm/test/CodeGen/AArch64/a57-csel.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,9 +2,9 @@
22

33
; Check that the select isn't expanded into a branch sequence
44
; when the icmp's first operand %x0 is from load.
5-
define i64 @f(i64 %a, i64 %b, i64* %c, i64 %d, i64 %e) {
5+
define i64 @f(i64 %a, i64 %b, ptr %c, i64 %d, i64 %e) {
66
; CHECK: csel
7-
%x0 = load i64, i64* %c
7+
%x0 = load i64, ptr %c
88
%x1 = icmp eq i64 %x0, 0
99
%x2 = select i1 %x1, i64 %a, i64 %b
1010
%x3 = add i64 %x2, %d

‎llvm/test/CodeGen/AArch64/aarch64-2014-08-11-MachineCombinerCrash.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -8,11 +8,11 @@ entry:
88
br label %for.body, !dbg !39
99

1010
for.body: ; preds = %for.body, %entry
11-
%arrayidx5 = getelementptr inbounds i32, i32* null, i64 1, !dbg !43
12-
%0 = load i32, i32* null, align 4, !dbg !45, !tbaa !46
11+
%arrayidx5 = getelementptr inbounds i32, ptr null, i64 1, !dbg !43
12+
%0 = load i32, ptr null, align 4, !dbg !45, !tbaa !46
1313
%s1 = sub nsw i32 0, %0, !dbg !50
1414
%n1 = sext i32 %s1 to i64, !dbg !50
15-
%arrayidx21 = getelementptr inbounds i32, i32* null, i64 3, !dbg !51
15+
%arrayidx21 = getelementptr inbounds i32, ptr null, i64 3, !dbg !51
1616
%add53 = add nsw i64 %n1, 0, !dbg !52
1717
%add55 = add nsw i64 %n1, 0, !dbg !53
1818
%mul63 = mul nsw i64 %add53, -20995, !dbg !54
@@ -24,13 +24,13 @@ for.body: ; preds = %for.body, %entry
2424
%add82 = add i64 %add81, 0, !dbg !58
2525
%shr83351 = lshr i64 %add82, 11, !dbg !58
2626
%conv84 = trunc i64 %shr83351 to i32, !dbg !58
27-
store i32 %conv84, i32* %arrayidx21, align 4, !dbg !58, !tbaa !46
27+
store i32 %conv84, ptr %arrayidx21, align 4, !dbg !58, !tbaa !46
2828
%add86 = add i64 0, 1024, !dbg !59
2929
%add87 = add i64 %add86, 0, !dbg !59
3030
%add88 = add i64 %add87, %add67, !dbg !59
3131
%shr89352 = lshr i64 %add88, 11, !dbg !59
3232
%n2 = trunc i64 %shr89352 to i32, !dbg !59
33-
store i32 %n2, i32* %arrayidx5, align 4, !dbg !59, !tbaa !46
33+
store i32 %n2, ptr %arrayidx5, align 4, !dbg !59, !tbaa !46
3434
br label %for.body, !dbg !39
3535
}
3636

‎llvm/test/CodeGen/AArch64/aarch64-2014-12-02-combine-soften.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,8 +9,8 @@ define void @foo() {
99
entry:
1010
;CHECK-LABEL: foo:
1111
;CHECK: __floatsisf
12-
%0 = load i32, i32* @x, align 4
12+
%0 = load i32, ptr @x, align 4
1313
%conv = sitofp i32 %0 to float
14-
store float %conv, float* bitcast (i32* @t to float*), align 4
14+
store float %conv, ptr @t, align 4
1515
ret void
1616
}

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