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ConstraintElim: teach fact-transfer about samesign (llvm#115893)
When the samesign flag is present on an icmp, we can transfer all the facts on the unsigned system to the signed system, and vice-versa: we do this by specializing transferToOtherSystem when samesign is present.
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2 files changed

+332
-20
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2 files changed

+332
-20
lines changed

llvm/lib/Transforms/Scalar/ConstraintElimination.cpp

Lines changed: 27 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -88,13 +88,12 @@ static Instruction *getContextInstForUse(Use &U) {
8888
namespace {
8989
/// Struct to express a condition of the form %Op0 Pred %Op1.
9090
struct ConditionTy {
91-
CmpInst::Predicate Pred;
92-
Value *Op0;
93-
Value *Op1;
91+
CmpPredicate Pred;
92+
Value *Op0 = nullptr;
93+
Value *Op1 = nullptr;
9494

95-
ConditionTy()
96-
: Pred(CmpInst::BAD_ICMP_PREDICATE), Op0(nullptr), Op1(nullptr) {}
97-
ConditionTy(CmpInst::Predicate Pred, Value *Op0, Value *Op1)
95+
ConditionTy() = default;
96+
ConditionTy(CmpPredicate Pred, Value *Op0, Value *Op1)
9897
: Pred(Pred), Op0(Op0), Op1(Op1) {}
9998
};
10099

@@ -132,18 +131,17 @@ struct FactOrCheck {
132131
Ty(Ty) {}
133132

134133
FactOrCheck(DomTreeNode *DTN, Use *U)
135-
: U(U), DoesHold(CmpInst::BAD_ICMP_PREDICATE, nullptr, nullptr),
136-
NumIn(DTN->getDFSNumIn()), NumOut(DTN->getDFSNumOut()),
134+
: U(U), NumIn(DTN->getDFSNumIn()), NumOut(DTN->getDFSNumOut()),
137135
Ty(EntryTy::UseCheck) {}
138136

139-
FactOrCheck(DomTreeNode *DTN, CmpInst::Predicate Pred, Value *Op0, Value *Op1,
140-
ConditionTy Precond = ConditionTy())
137+
FactOrCheck(DomTreeNode *DTN, CmpPredicate Pred, Value *Op0, Value *Op1,
138+
ConditionTy Precond = {})
141139
: Cond(Pred, Op0, Op1), DoesHold(Precond), NumIn(DTN->getDFSNumIn()),
142140
NumOut(DTN->getDFSNumOut()), Ty(EntryTy::ConditionFact) {}
143141

144-
static FactOrCheck getConditionFact(DomTreeNode *DTN, CmpInst::Predicate Pred,
142+
static FactOrCheck getConditionFact(DomTreeNode *DTN, CmpPredicate Pred,
145143
Value *Op0, Value *Op1,
146-
ConditionTy Precond = ConditionTy()) {
144+
ConditionTy Precond = {}) {
147145
return FactOrCheck(DTN, Pred, Op0, Op1, Precond);
148146
}
149147

@@ -1176,8 +1174,7 @@ void State::addInfoFor(BasicBlock &BB) {
11761174
if (auto *Cmp = dyn_cast<ICmpInst>(Cur)) {
11771175
WorkList.emplace_back(FactOrCheck::getConditionFact(
11781176
DT.getNode(Successor),
1179-
IsOr ? CmpInst::getInversePredicate(Cmp->getPredicate())
1180-
: Cmp->getPredicate(),
1177+
IsOr ? Cmp->getInverseCmpPredicate() : Cmp->getCmpPredicate(),
11811178
Cmp->getOperand(0), Cmp->getOperand(1)));
11821179
continue;
11831180
}
@@ -1201,13 +1198,12 @@ void State::addInfoFor(BasicBlock &BB) {
12011198
return;
12021199
if (canAddSuccessor(BB, Br->getSuccessor(0)))
12031200
WorkList.emplace_back(FactOrCheck::getConditionFact(
1204-
DT.getNode(Br->getSuccessor(0)), CmpI->getPredicate(),
1201+
DT.getNode(Br->getSuccessor(0)), CmpI->getCmpPredicate(),
12051202
CmpI->getOperand(0), CmpI->getOperand(1)));
12061203
if (canAddSuccessor(BB, Br->getSuccessor(1)))
12071204
WorkList.emplace_back(FactOrCheck::getConditionFact(
1208-
DT.getNode(Br->getSuccessor(1)),
1209-
CmpInst::getInversePredicate(CmpI->getPredicate()), CmpI->getOperand(0),
1210-
CmpI->getOperand(1)));
1205+
DT.getNode(Br->getSuccessor(1)), CmpI->getInverseCmpPredicate(),
1206+
CmpI->getOperand(0), CmpI->getOperand(1)));
12111207
}
12121208

12131209
#ifndef NDEBUG
@@ -1806,7 +1802,7 @@ static bool eliminateConstraints(Function &F, DominatorTree &DT, LoopInfo &LI,
18061802
continue;
18071803
}
18081804

1809-
auto AddFact = [&](CmpInst::Predicate Pred, Value *A, Value *B) {
1805+
auto AddFact = [&](CmpPredicate Pred, Value *A, Value *B) {
18101806
LLVM_DEBUG(dbgs() << "Processing fact to add to the system: ";
18111807
dumpUnpackedICmp(dbgs(), Pred, A, B); dbgs() << "\n");
18121808
if (Info.getCS(CmpInst::isSigned(Pred)).size() > MaxRows) {
@@ -1820,7 +1816,18 @@ static bool eliminateConstraints(Function &F, DominatorTree &DT, LoopInfo &LI,
18201816
if (ReproducerModule && DFSInStack.size() > ReproducerCondStack.size())
18211817
ReproducerCondStack.emplace_back(Pred, A, B);
18221818

1823-
Info.transferToOtherSystem(Pred, A, B, CB.NumIn, CB.NumOut, DFSInStack);
1819+
if (ICmpInst::isRelational(Pred)) {
1820+
// If samesign is present on the ICmp, simply flip the sign of the
1821+
// predicate, transferring the information from the signed system to the
1822+
// unsigned system, and viceversa.
1823+
if (Pred.hasSameSign())
1824+
Info.addFact(ICmpInst::getFlippedSignednessPredicate(Pred), A, B,
1825+
CB.NumIn, CB.NumOut, DFSInStack);
1826+
else
1827+
Info.transferToOtherSystem(Pred, A, B, CB.NumIn, CB.NumOut,
1828+
DFSInStack);
1829+
}
1830+
18241831
if (ReproducerModule && DFSInStack.size() > ReproducerCondStack.size()) {
18251832
// Add dummy entries to ReproducerCondStack to keep it in sync with
18261833
// DFSInStack.

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