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shiltiankzhuravl
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[AMDGPU] Refactor code for GETPC bundle updates in hazards (NFCI)
As suggested in review for PR llvm#100067. Refactor code for S_GETPC_B64 bundle updates for use with multiple hazard mitigations. (cherry picked from commit 987ffc3)
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+36
-14
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llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp

Lines changed: 36 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -2933,6 +2933,38 @@ bool GCNHazardRecognizer::ShouldPreferAnother(SUnit *SU) {
29332933
return false;
29342934
}
29352935

2936+
// Adjust global offsets for instructions bundled with S_GETPC_B64 after
2937+
// insertion of a new instruction.
2938+
static void updateGetPCBundle(MachineInstr *NewMI) {
2939+
if (!NewMI->isBundled())
2940+
return;
2941+
2942+
// Find start of bundle.
2943+
auto I = NewMI->getIterator();
2944+
while (I->isBundledWithPred())
2945+
I--;
2946+
if (I->isBundle())
2947+
I++;
2948+
2949+
// Bail if this is not an S_GETPC bundle.
2950+
if (I->getOpcode() != AMDGPU::S_GETPC_B64)
2951+
return;
2952+
2953+
// Update offsets of any references in the bundle.
2954+
const unsigned NewBytes = 4;
2955+
assert(NewMI->getOpcode() == AMDGPU::S_WAITCNT_DEPCTR &&
2956+
"Unexpected instruction insertion in bundle");
2957+
auto NextMI = std::next(NewMI->getIterator());
2958+
auto End = NewMI->getParent()->end();
2959+
while (NextMI != End && NextMI->isBundledWithPred()) {
2960+
for (auto &Operand : NextMI->operands()) {
2961+
if (Operand.isGlobal())
2962+
Operand.setOffset(Operand.getOffset() + NewBytes);
2963+
}
2964+
NextMI++;
2965+
}
2966+
}
2967+
29362968
bool GCNHazardRecognizer::fixVALUMaskWriteHazard(MachineInstr *MI) {
29372969
if (!ST.hasVALUMaskWriteHazard())
29382970
return false;
@@ -3050,22 +3082,12 @@ bool GCNHazardRecognizer::fixVALUMaskWriteHazard(MachineInstr *MI) {
30503082
auto NextMI = std::next(MI->getIterator());
30513083

30523084
// Add s_waitcnt_depctr sa_sdst(0) after SALU write.
3053-
BuildMI(*MI->getParent(), NextMI, MI->getDebugLoc(),
3054-
TII.get(AMDGPU::S_WAITCNT_DEPCTR))
3055-
.addImm(AMDGPU::DepCtr::encodeFieldSaSdst(0));
3085+
auto NewMI = BuildMI(*MI->getParent(), NextMI, MI->getDebugLoc(),
3086+
TII.get(AMDGPU::S_WAITCNT_DEPCTR))
3087+
.addImm(AMDGPU::DepCtr::encodeFieldSaSdst(0));
30563088

30573089
// SALU write may be s_getpc in a bundle.
3058-
if (MI->getOpcode() == AMDGPU::S_GETPC_B64) {
3059-
// Update offsets of any references in the bundle.
3060-
while (NextMI != MI->getParent()->end() &&
3061-
NextMI->isBundledWithPred()) {
3062-
for (auto &Operand : NextMI->operands()) {
3063-
if (Operand.isGlobal())
3064-
Operand.setOffset(Operand.getOffset() + 4);
3065-
}
3066-
NextMI++;
3067-
}
3068-
}
3090+
updateGetPCBundle(NewMI);
30693091

30703092
return true;
30713093
}

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