[AMDGPU] Mark PC_ADD_REL_OFFSET rematerializable (llvm#79674)

This is cherrypick of llvm#79674

Currently machine LICM hoist PC_ADD_REL_OFFSET out of loops, causes
register pressure when function calls are deep in loops. This is a main
cause of sgpr spill for programs containing large number of function
calls in loops.

This patch marks PC_ADD_REL_OFFSET as rematerializable, which eliminates
sgpr spills due to function calls in loops.

Change-Id: I4aec3dfd93b13390ccbc69ab5048a3fe83c268c1

Author: yxsamliu

llvm/lib/Target/AMDGPU/SIInstructions.td

@@ -962,6 +962,7 @@ defm SI_SPILL_AV1024 : SI_SPILL_VGPR <AV_1024, 1>;
 let isConvergent = 1 in
 defm SI_SPILL_WWM_V32 : SI_SPILL_VGPR <VGPR_32>;
 
+let isReMaterializable = 1, isAsCheapAsAMove = 1 in
 def SI_PC_ADD_REL_OFFSET : SPseudoInstSI <
   (outs SReg_64:$dst),
   (ins si_ga:$ptr_lo, si_ga:$ptr_hi),