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[SPIRV][HLSL] map lerp to Fmix (llvm#88976)
- `clang/lib/CodeGen/CGBuiltin.cpp` - switch to using `getLerpIntrinsic()` to abstract backend intrinsic - `clang/lib/CodeGen/CGHLSLRuntime.h` - add `getLerpIntrinsic()` - `llvm/include/llvm/IR/IntrinsicsSPIRV.td` - add SPIRV intrinsic for lerp - `llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp` - add mapping of HLSL's lerp to GLSL's Fmix. resolves llvm#88940
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-151
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10 files changed

+260
-151
lines changed

‎clang/lib/CodeGen/CGBuiltin.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18267,8 +18267,8 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
1826718267
if (!E->getArg(0)->getType()->hasFloatingRepresentation())
1826818268
llvm_unreachable("lerp operand must have a float representation");
1826918269
return Builder.CreateIntrinsic(
18270-
/*ReturnType=*/X->getType(), Intrinsic::dx_lerp,
18271-
ArrayRef<Value *>{X, Y, S}, nullptr, "dx.lerp");
18270+
/*ReturnType=*/X->getType(), CGM.getHLSLRuntime().getLerpIntrinsic(),
18271+
ArrayRef<Value *>{X, Y, S}, nullptr, "hlsl.lerp");
1827218272
}
1827318273
case Builtin::BI__builtin_hlsl_elementwise_frac: {
1827418274
Value *Op0 = EmitScalarExpr(E->getArg(0));

‎clang/lib/CodeGen/CGHLSLRuntime.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -74,6 +74,7 @@ class CGHLSLRuntime {
7474

7575
GENERATE_HLSL_INTRINSIC_FUNCTION(All, all)
7676
GENERATE_HLSL_INTRINSIC_FUNCTION(Any, any)
77+
GENERATE_HLSL_INTRINSIC_FUNCTION(Lerp, lerp)
7778
GENERATE_HLSL_INTRINSIC_FUNCTION(ThreadId, thread_id)
7879

7980
//===----------------------------------------------------------------------===//

‎clang/test/CodeGenHLSL/builtins/lerp-builtin.hlsl

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,15 +1,15 @@
11
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.3-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -o - | FileCheck %s
22

33
// CHECK-LABEL: builtin_lerp_half_vector
4-
// CHECK: %dx.lerp = call <3 x half> @llvm.dx.lerp.v3f16(<3 x half> %0, <3 x half> %1, <3 x half> %2)
5-
// CHECK: ret <3 x half> %dx.lerp
4+
// CHECK: %hlsl.lerp = call <3 x half> @llvm.dx.lerp.v3f16(<3 x half> %0, <3 x half> %1, <3 x half> %2)
5+
// CHECK: ret <3 x half> %hlsl.lerp
66
half3 builtin_lerp_half_vector (half3 p0) {
77
return __builtin_hlsl_lerp ( p0, p0, p0 );
88
}
99

1010
// CHECK-LABEL: builtin_lerp_floar_vector
11-
// CHECK: %dx.lerp = call <2 x float> @llvm.dx.lerp.v2f32(<2 x float> %0, <2 x float> %1, <2 x float> %2)
12-
// CHECK: ret <2 x float> %dx.lerp
11+
// CHECK: %hlsl.lerp = call <2 x float> @llvm.dx.lerp.v2f32(<2 x float> %0, <2 x float> %1, <2 x float> %2)
12+
// CHECK: ret <2 x float> %hlsl.lerp
1313
float2 builtin_lerp_floar_vector ( float2 p0) {
1414
return __builtin_hlsl_lerp ( p0, p0, p0 );
1515
}

‎clang/test/CodeGenHLSL/builtins/lerp.hlsl

Lines changed: 60 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -1,78 +1,102 @@
11
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
22
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
33
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
4-
// RUN: --check-prefixes=CHECK,NATIVE_HALF
4+
// RUN: --check-prefixes=CHECK,DXIL_CHECK,DXIL_NATIVE_HALF,NATIVE_HALF
55
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
66
// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
7-
// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
7+
// RUN: -o - | FileCheck %s --check-prefixes=CHECK,DXIL_CHECK,NO_HALF,DXIL_NO_HALF
8+
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
9+
// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \
10+
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
11+
// RUN: --check-prefixes=CHECK,NATIVE_HALF,SPIR_NATIVE_HALF,SPIR_CHECK
12+
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
13+
// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
14+
// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF,SPIR_NO_HALF,SPIR_CHECK
815

916

10-
// NATIVE_HALF: %dx.lerp = call half @llvm.dx.lerp.f16(half %0, half %1, half %2)
11-
// NATIVE_HALF: ret half %dx.lerp
12-
// NO_HALF: %dx.lerp = call float @llvm.dx.lerp.f32(float %0, float %1, float %2)
13-
// NO_HALF: ret float %dx.lerp
17+
// DXIL_NATIVE_HALF: %hlsl.lerp = call half @llvm.dx.lerp.f16(half %0, half %1, half %2)
18+
// SPIR_NATIVE_HALF: %hlsl.lerp = call half @llvm.spv.lerp.f16(half %0, half %1, half %2)
19+
// NATIVE_HALF: ret half %hlsl.lerp
20+
// DXIL_NO_HALF: %hlsl.lerp = call float @llvm.dx.lerp.f32(float %0, float %1, float %2)
21+
// SPIR_NO_HALF: %hlsl.lerp = call float @llvm.spv.lerp.f32(float %0, float %1, float %2)
22+
// NO_HALF: ret float %hlsl.lerp
1423
half test_lerp_half(half p0) { return lerp(p0, p0, p0); }
1524

16-
// NATIVE_HALF: %dx.lerp = call <2 x half> @llvm.dx.lerp.v2f16(<2 x half> %0, <2 x half> %1, <2 x half> %2)
17-
// NATIVE_HALF: ret <2 x half> %dx.lerp
18-
// NO_HALF: %dx.lerp = call <2 x float> @llvm.dx.lerp.v2f32(<2 x float> %0, <2 x float> %1, <2 x float> %2)
19-
// NO_HALF: ret <2 x float> %dx.lerp
25+
// DXIL_NATIVE_HALF: %hlsl.lerp = call <2 x half> @llvm.dx.lerp.v2f16(<2 x half> %0, <2 x half> %1, <2 x half> %2)
26+
// SPIR_NATIVE_HALF: %hlsl.lerp = call <2 x half> @llvm.spv.lerp.v2f16(<2 x half> %0, <2 x half> %1, <2 x half> %2)
27+
// NATIVE_HALF: ret <2 x half> %hlsl.lerp
28+
// DXIL_NO_HALF: %hlsl.lerp = call <2 x float> @llvm.dx.lerp.v2f32(<2 x float> %0, <2 x float> %1, <2 x float> %2)
29+
// SPIR_NO_HALF: %hlsl.lerp = call <2 x float> @llvm.spv.lerp.v2f32(<2 x float> %0, <2 x float> %1, <2 x float> %2)
30+
// NO_HALF: ret <2 x float> %hlsl.lerp
2031
half2 test_lerp_half2(half2 p0) { return lerp(p0, p0, p0); }
2132

22-
// NATIVE_HALF: %dx.lerp = call <3 x half> @llvm.dx.lerp.v3f16(<3 x half> %0, <3 x half> %1, <3 x half> %2)
23-
// NATIVE_HALF: ret <3 x half> %dx.lerp
24-
// NO_HALF: %dx.lerp = call <3 x float> @llvm.dx.lerp.v3f32(<3 x float> %0, <3 x float> %1, <3 x float> %2)
25-
// NO_HALF: ret <3 x float> %dx.lerp
33+
// DXIL_NATIVE_HALF: %hlsl.lerp = call <3 x half> @llvm.dx.lerp.v3f16(<3 x half> %0, <3 x half> %1, <3 x half> %2)
34+
// SPIR_NATIVE_HALF: %hlsl.lerp = call <3 x half> @llvm.spv.lerp.v3f16(<3 x half> %0, <3 x half> %1, <3 x half> %2)
35+
// NATIVE_HALF: ret <3 x half> %hlsl.lerp
36+
// DXIL_NO_HALF: %hlsl.lerp = call <3 x float> @llvm.dx.lerp.v3f32(<3 x float> %0, <3 x float> %1, <3 x float> %2)
37+
// SPIR_NO_HALF: %hlsl.lerp = call <3 x float> @llvm.spv.lerp.v3f32(<3 x float> %0, <3 x float> %1, <3 x float> %2)
38+
// NO_HALF: ret <3 x float> %hlsl.lerp
2639
half3 test_lerp_half3(half3 p0) { return lerp(p0, p0, p0); }
2740

28-
// NATIVE_HALF: %dx.lerp = call <4 x half> @llvm.dx.lerp.v4f16(<4 x half> %0, <4 x half> %1, <4 x half> %2)
29-
// NATIVE_HALF: ret <4 x half> %dx.lerp
30-
// NO_HALF: %dx.lerp = call <4 x float> @llvm.dx.lerp.v4f32(<4 x float> %0, <4 x float> %1, <4 x float> %2)
31-
// NO_HALF: ret <4 x float> %dx.lerp
41+
// DXIL_NATIVE_HALF: %hlsl.lerp = call <4 x half> @llvm.dx.lerp.v4f16(<4 x half> %0, <4 x half> %1, <4 x half> %2)
42+
// SPIR_NATIVE_HALF: %hlsl.lerp = call <4 x half> @llvm.spv.lerp.v4f16(<4 x half> %0, <4 x half> %1, <4 x half> %2)
43+
// NATIVE_HALF: ret <4 x half> %hlsl.lerp
44+
// DXIL_NO_HALF: %hlsl.lerp = call <4 x float> @llvm.dx.lerp.v4f32(<4 x float> %0, <4 x float> %1, <4 x float> %2)
45+
// SPIR_NO_HALF: %hlsl.lerp = call <4 x float> @llvm.spv.lerp.v4f32(<4 x float> %0, <4 x float> %1, <4 x float> %2)
46+
// NO_HALF: ret <4 x float> %hlsl.lerp
3247
half4 test_lerp_half4(half4 p0) { return lerp(p0, p0, p0); }
3348

34-
// CHECK: %dx.lerp = call float @llvm.dx.lerp.f32(float %0, float %1, float %2)
35-
// CHECK: ret float %dx.lerp
49+
// DXIL_CHECK: %hlsl.lerp = call float @llvm.dx.lerp.f32(float %0, float %1, float %2)
50+
// SPIR_CHECK: %hlsl.lerp = call float @llvm.spv.lerp.f32(float %0, float %1, float %2)
51+
// CHECK: ret float %hlsl.lerp
3652
float test_lerp_float(float p0) { return lerp(p0, p0, p0); }
3753

38-
// CHECK: %dx.lerp = call <2 x float> @llvm.dx.lerp.v2f32(<2 x float> %0, <2 x float> %1, <2 x float> %2)
39-
// CHECK: ret <2 x float> %dx.lerp
54+
// DXIL_CHECK: %hlsl.lerp = call <2 x float> @llvm.dx.lerp.v2f32(<2 x float> %0, <2 x float> %1, <2 x float> %2)
55+
// SPIR_CHECK: %hlsl.lerp = call <2 x float> @llvm.spv.lerp.v2f32(<2 x float> %0, <2 x float> %1, <2 x float> %2)
56+
// CHECK: ret <2 x float> %hlsl.lerp
4057
float2 test_lerp_float2(float2 p0) { return lerp(p0, p0, p0); }
4158

42-
// CHECK: %dx.lerp = call <3 x float> @llvm.dx.lerp.v3f32(<3 x float> %0, <3 x float> %1, <3 x float> %2)
43-
// CHECK: ret <3 x float> %dx.lerp
59+
// DXIL_CHECK: %hlsl.lerp = call <3 x float> @llvm.dx.lerp.v3f32(<3 x float> %0, <3 x float> %1, <3 x float> %2)
60+
// SPIR_CHECK: %hlsl.lerp = call <3 x float> @llvm.spv.lerp.v3f32(<3 x float> %0, <3 x float> %1, <3 x float> %2)
61+
// CHECK: ret <3 x float> %hlsl.lerp
4462
float3 test_lerp_float3(float3 p0) { return lerp(p0, p0, p0); }
4563

46-
// CHECK: %dx.lerp = call <4 x float> @llvm.dx.lerp.v4f32(<4 x float> %0, <4 x float> %1, <4 x float> %2)
47-
// CHECK: ret <4 x float> %dx.lerp
64+
// DXIL_CHECK: %hlsl.lerp = call <4 x float> @llvm.dx.lerp.v4f32(<4 x float> %0, <4 x float> %1, <4 x float> %2)
65+
// SPIR_CHECK: %hlsl.lerp = call <4 x float> @llvm.spv.lerp.v4f32(<4 x float> %0, <4 x float> %1, <4 x float> %2)
66+
// CHECK: ret <4 x float> %hlsl.lerp
4867
float4 test_lerp_float4(float4 p0) { return lerp(p0, p0, p0); }
4968

50-
// CHECK: %dx.lerp = call <2 x float> @llvm.dx.lerp.v2f32(<2 x float> %splat.splat, <2 x float> %1, <2 x float> %2)
51-
// CHECK: ret <2 x float> %dx.lerp
69+
// DXIL_CHECK: %hlsl.lerp = call <2 x float> @llvm.dx.lerp.v2f32(<2 x float> %splat.splat, <2 x float> %1, <2 x float> %2)
70+
// SPIR_CHECK: %hlsl.lerp = call <2 x float> @llvm.spv.lerp.v2f32(<2 x float> %splat.splat, <2 x float> %1, <2 x float> %2)
71+
// CHECK: ret <2 x float> %hlsl.lerp
5272
float2 test_lerp_float2_splat(float p0, float2 p1) { return lerp(p0, p1, p1); }
5373

54-
// CHECK: %dx.lerp = call <3 x float> @llvm.dx.lerp.v3f32(<3 x float> %splat.splat, <3 x float> %1, <3 x float> %2)
55-
// CHECK: ret <3 x float> %dx.lerp
74+
// DXIL_CHECK: %hlsl.lerp = call <3 x float> @llvm.dx.lerp.v3f32(<3 x float> %splat.splat, <3 x float> %1, <3 x float> %2)
75+
// SPIR_CHECK: %hlsl.lerp = call <3 x float> @llvm.spv.lerp.v3f32(<3 x float> %splat.splat, <3 x float> %1, <3 x float> %2)
76+
// CHECK: ret <3 x float> %hlsl.lerp
5677
float3 test_lerp_float3_splat(float p0, float3 p1) { return lerp(p0, p1, p1); }
5778

58-
// CHECK: %dx.lerp = call <4 x float> @llvm.dx.lerp.v4f32(<4 x float> %splat.splat, <4 x float> %1, <4 x float> %2)
59-
// CHECK: ret <4 x float> %dx.lerp
79+
// DXIL_CHECK: %hlsl.lerp = call <4 x float> @llvm.dx.lerp.v4f32(<4 x float> %splat.splat, <4 x float> %1, <4 x float> %2)
80+
// SPIR_CHECK: %hlsl.lerp = call <4 x float> @llvm.spv.lerp.v4f32(<4 x float> %splat.splat, <4 x float> %1, <4 x float> %2)
81+
// CHECK: ret <4 x float> %hlsl.lerp
6082
float4 test_lerp_float4_splat(float p0, float4 p1) { return lerp(p0, p1, p1); }
6183

6284
// CHECK: %conv = sitofp i32 %2 to float
6385
// CHECK: %splat.splatinsert = insertelement <2 x float> poison, float %conv, i64 0
6486
// CHECK: %splat.splat = shufflevector <2 x float> %splat.splatinsert, <2 x float> poison, <2 x i32> zeroinitializer
65-
// CHECK: %dx.lerp = call <2 x float> @llvm.dx.lerp.v2f32(<2 x float> %0, <2 x float> %1, <2 x float> %splat.splat)
66-
// CHECK: ret <2 x float> %dx.lerp
87+
// DXIL_CHECK: %hlsl.lerp = call <2 x float> @llvm.dx.lerp.v2f32(<2 x float> %0, <2 x float> %1, <2 x float> %splat.splat)
88+
// SPIR_CHECK: %hlsl.lerp = call <2 x float> @llvm.spv.lerp.v2f32(<2 x float> %0, <2 x float> %1, <2 x float> %splat.splat)
89+
// CHECK: ret <2 x float> %hlsl.lerp
6790
float2 test_lerp_float2_int_splat(float2 p0, int p1) {
6891
return lerp(p0, p0, p1);
6992
}
7093

7194
// CHECK: %conv = sitofp i32 %2 to float
7295
// CHECK: %splat.splatinsert = insertelement <3 x float> poison, float %conv, i64 0
7396
// CHECK: %splat.splat = shufflevector <3 x float> %splat.splatinsert, <3 x float> poison, <3 x i32> zeroinitializer
74-
// CHECK: %dx.lerp = call <3 x float> @llvm.dx.lerp.v3f32(<3 x float> %0, <3 x float> %1, <3 x float> %splat.splat)
75-
// CHECK: ret <3 x float> %dx.lerp
97+
// DXIL_CHECK: %hlsl.lerp = call <3 x float> @llvm.dx.lerp.v3f32(<3 x float> %0, <3 x float> %1, <3 x float> %splat.splat)
98+
// SPIR_CHECK: %hlsl.lerp = call <3 x float> @llvm.spv.lerp.v3f32(<3 x float> %0, <3 x float> %1, <3 x float> %splat.splat)
99+
// CHECK: ret <3 x float> %hlsl.lerp
76100
float3 test_lerp_float3_int_splat(float3 p0, int p1) {
77101
return lerp(p0, p0, p1);
78102
}

‎llvm/include/llvm/IR/IntrinsicsSPIRV.td

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -58,4 +58,6 @@ let TargetPrefix = "spv" in {
5858
Intrinsic<[ llvm_ptr_ty ], [llvm_i8_ty], [IntrWillReturn]>;
5959
def int_spv_all : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_any_ty]>;
6060
def int_spv_any : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_any_ty]>;
61+
def int_spv_lerp : Intrinsic<[LLVMMatchType<0>], [llvm_anyfloat_ty, LLVMMatchType<0>,LLVMMatchType<0>],
62+
[IntrNoMem, IntrWillReturn] >;
6163
}

‎llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -170,6 +170,9 @@ class SPIRVInstructionSelector : public InstructionSelector {
170170
bool selectFCmp(Register ResVReg, const SPIRVType *ResType,
171171
MachineInstr &I) const;
172172

173+
bool selectFmix(Register ResVReg, const SPIRVType *ResType,
174+
MachineInstr &I) const;
175+
173176
void renderImm32(MachineInstrBuilder &MIB, const MachineInstr &I,
174177
int OpIdx) const;
175178
void renderFImm32(MachineInstrBuilder &MIB, const MachineInstr &I,
@@ -1242,6 +1245,27 @@ bool SPIRVInstructionSelector::selectAny(Register ResVReg,
12421245
return selectAnyOrAll(ResVReg, ResType, I, SPIRV::OpAny);
12431246
}
12441247

1248+
bool SPIRVInstructionSelector::selectFmix(Register ResVReg,
1249+
const SPIRVType *ResType,
1250+
MachineInstr &I) const {
1251+
1252+
assert(I.getNumOperands() == 5);
1253+
assert(I.getOperand(2).isReg());
1254+
assert(I.getOperand(3).isReg());
1255+
assert(I.getOperand(4).isReg());
1256+
MachineBasicBlock &BB = *I.getParent();
1257+
1258+
return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpExtInst))
1259+
.addDef(ResVReg)
1260+
.addUse(GR.getSPIRVTypeID(ResType))
1261+
.addImm(static_cast<uint32_t>(SPIRV::InstructionSet::GLSL_std_450))
1262+
.addImm(GL::FMix)
1263+
.addUse(I.getOperand(2).getReg())
1264+
.addUse(I.getOperand(3).getReg())
1265+
.addUse(I.getOperand(4).getReg())
1266+
.constrainAllUses(TII, TRI, RBI);
1267+
}
1268+
12451269
bool SPIRVInstructionSelector::selectBitreverse(Register ResVReg,
12461270
const SPIRVType *ResType,
12471271
MachineInstr &I) const {
@@ -1902,6 +1926,8 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
19021926
return selectAll(ResVReg, ResType, I);
19031927
case Intrinsic::spv_any:
19041928
return selectAny(ResVReg, ResType, I);
1929+
case Intrinsic::spv_lerp:
1930+
return selectFmix(ResVReg, ResType, I);
19051931
case Intrinsic::spv_lifetime_start:
19061932
case Intrinsic::spv_lifetime_end: {
19071933
unsigned Op = IID == Intrinsic::spv_lifetime_start ? SPIRV::OpLifetimeStart

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