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toppercjrbyrnes
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[AMDGPU] Correct assert that incorrectly chained multiple == operators. (llvm#70291)
Change-Id: I19593c4b93f4f3e1820e692a52d26e7e8866c5cf
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llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1127,8 +1127,8 @@ void MFMASmallGemmSingleWaveOpt::applyIGLPStrategy(
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unsigned MFMACount = 0;
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unsigned DSRCount = 0;
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assert((IsPostRA ||
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DSWCount == DSWWithPermCount == DSWWithSharedVMEMCount == 0) &&
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assert((IsPostRA || (DSWCount == 0 && DSWWithPermCount == 0 &&
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DSWWithSharedVMEMCount == 0)) &&
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"DSWCounters should be zero in pre-RA scheduling!");
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SmallVector<SUnit *, 6> DSWithPerms;
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for (auto &SU : DAG->SUnits) {

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