@@ -1426,16 +1426,23 @@ static void computeKnownBitsFromOperator(const Operator *I,
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// this is sufficient to catch some interesting cases.
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unsigned Opcode = BO->getOpcode ();
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- // If this is a shift recurrence, we know the bits being shifted in.
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- // We can combine that with information about the start value of the
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- // recurrence to conclude facts about the result.
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switch (Opcode) {
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+ // If this is a shift recurrence, we know the bits being shifted in. We
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+ // can combine that with information about the start value of the
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+ // recurrence to conclude facts about the result. If this is a udiv
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+ // recurrence, we know that the result can never exceed either the
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+ // numerator or the start value, whichever is greater.
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case Instruction::LShr:
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case Instruction::AShr:
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- case Instruction::Shl: {
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+ case Instruction::Shl:
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+ case Instruction::UDiv:
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if (BO->getOperand (0 ) != I)
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break ;
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+ [[fallthrough]];
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+ // For a urem recurrence, the result can never exceed the start value. The
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+ // phi could either be the numerator or the denominator.
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+ case Instruction::URem: {
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// We have matched a recurrence of the form:
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// %iv = [R, %entry], [%iv.next, %backedge]
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// %iv.next = shift_op %iv, L
@@ -1453,8 +1460,10 @@ static void computeKnownBitsFromOperator(const Operator *I,
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Known.Zero .setLowBits (Known2.countMinTrailingZeros ());
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break ;
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case Instruction::LShr:
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- // A lshr recurrence will preserve the leading zeros of the
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- // start value
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+ case Instruction::UDiv:
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+ case Instruction::URem:
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+ // lshr, udiv, and urem recurrences will preserve the leading zeros of
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+ // the start value.
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Known.Zero .setHighBits (Known2.countMinLeadingZeros ());
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break ;
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case Instruction::AShr:
@@ -1542,6 +1551,7 @@ static void computeKnownBitsFromOperator(const Operator *I,
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}
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break ;
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}
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+
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default :
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break ;
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}
@@ -9039,12 +9049,14 @@ bool llvm::matchSimpleRecurrence(const PHINode *P, BinaryOperator *&BO,
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switch (Opcode) {
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default :
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continue ;
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- // TODO: Expand list -- xor, div, gep, uaddo, etc. .
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+ // TODO: Expand list -- xor, gep, uadd.sat etc.
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case Instruction::LShr:
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case Instruction::AShr:
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case Instruction::Shl:
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case Instruction::Add:
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case Instruction::Sub:
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+ case Instruction::UDiv:
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+ case Instruction::URem:
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case Instruction::And:
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case Instruction::Or:
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case Instruction::Mul:
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