ice: Use div64_u64 instead of div_u64 in adjfine

kolacinskikarol · anguy11 · commit 0013881c1145 · 2021-12-14T11:29:34.000-08:00
Change the division in ice_ptp_adjfine from div_u64 to div64_u64. div_u64 is used when the divisor is 32 bit but in this case incval is 64 bit and it caused incorrect calculations and incval adjustments. Fixes: 06c16d8 ("ice: register 1588 PTP clock device object for E810 devices") Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com> Tested-by: Gurucharan G <gurucharanx.g@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c
@@ -705,7 +705,7 @@ static int ice_ptp_adjfine(struct ptp_clock_info *info, long scaled_ppm)
 		scaled_ppm = -scaled_ppm;
 	}
 
-	while ((u64)scaled_ppm > div_u64(U64_MAX, incval)) {
+	while ((u64)scaled_ppm > div64_u64(U64_MAX, incval)) {
 		/* handle overflow by scaling down the scaled_ppm and
 		 * the divisor, losing some precision
 		 */

Original file line number	Diff line number	Diff line change
`@@ -705,7 +705,7 @@ static int ice_ptp_adjfine(struct ptp_clock_info *info, long scaled_ppm)`
`705`	`705`	`scaled_ppm = -scaled_ppm;`
`706`	`706`	`}`
`707`	`707`
`708`		`- while ((u64)scaled_ppm > div_u64(U64_MAX, incval)) {`
	`708`	`+ while ((u64)scaled_ppm > div64_u64(U64_MAX, incval)) {`
`709`	`709`	`/* handle overflow by scaling down the scaled_ppm and`
`710`	`710`	`* the divisor, losing some precision`
`711`	`711`	`*/`