@@ -152,13 +152,17 @@ static struct nand_hw_control omap_gpmc_controller = {
152
152
};
153
153
154
154
struct omap_nand_info {
155
- struct omap_nand_platform_data * pdata ;
156
155
struct nand_chip nand ;
157
156
struct platform_device * pdev ;
158
157
159
158
int gpmc_cs ;
160
- unsigned long phys_base ;
159
+ bool dev_ready ;
160
+ enum nand_io xfer_type ;
161
+ int devsize ;
161
162
enum omap_ecc ecc_opt ;
163
+ struct device_node * elm_of_node ;
164
+
165
+ unsigned long phys_base ;
162
166
struct completion comp ;
163
167
struct dma_chan * dma ;
164
168
int gpmc_irq_fifo ;
@@ -1631,7 +1635,7 @@ static bool omap2_nand_ecc_check(struct omap_nand_info *info,
1631
1635
"CONFIG_MTD_NAND_OMAP_BCH not enabled\n" );
1632
1636
return false;
1633
1637
}
1634
- if (ecc_needs_elm && !is_elm_present (info , pdata -> elm_of_node )) {
1638
+ if (ecc_needs_elm && !is_elm_present (info , info -> elm_of_node )) {
1635
1639
dev_err (& info -> pdev -> dev , "ELM not available\n" );
1636
1640
return false;
1637
1641
}
@@ -1675,6 +1679,11 @@ static int omap_nand_probe(struct platform_device *pdev)
1675
1679
info -> gpmc_cs = pdata -> cs ;
1676
1680
info -> of_node = pdata -> of_node ;
1677
1681
info -> ecc_opt = pdata -> ecc_opt ;
1682
+ info -> dev_ready = pdata -> dev_ready ;
1683
+ info -> xfer_type = pdata -> xfer_type ;
1684
+ info -> devsize = pdata -> devsize ;
1685
+ info -> elm_of_node = pdata -> elm_of_node ;
1686
+
1678
1687
nand_chip = & info -> nand ;
1679
1688
mtd = nand_to_mtd (nand_chip );
1680
1689
mtd -> dev .parent = & pdev -> dev ;
@@ -1700,7 +1709,7 @@ static int omap_nand_probe(struct platform_device *pdev)
1700
1709
* chip delay which is slightly more than tR (AC Timing) of the NAND
1701
1710
* device and read status register until you get a failure or success
1702
1711
*/
1703
- if (pdata -> dev_ready ) {
1712
+ if (info -> dev_ready ) {
1704
1713
nand_chip -> dev_ready = omap_dev_ready ;
1705
1714
nand_chip -> chip_delay = 0 ;
1706
1715
} else {
@@ -1714,15 +1723,16 @@ static int omap_nand_probe(struct platform_device *pdev)
1714
1723
nand_chip -> options |= NAND_SKIP_BBTSCAN ;
1715
1724
1716
1725
/* scan NAND device connected to chip controller */
1717
- nand_chip -> options |= pdata -> devsize & NAND_BUSWIDTH_16 ;
1726
+ nand_chip -> options |= info -> devsize & NAND_BUSWIDTH_16 ;
1718
1727
if (nand_scan_ident (mtd , 1 , NULL )) {
1719
- dev_err (& info -> pdev -> dev , "scan failed, may be bus-width mismatch\n" );
1728
+ dev_err (& info -> pdev -> dev ,
1729
+ "scan failed, may be bus-width mismatch\n" );
1720
1730
err = - ENXIO ;
1721
1731
goto return_error ;
1722
1732
}
1723
1733
1724
1734
/* re-populate low-level callbacks based on xfer modes */
1725
- switch (pdata -> xfer_type ) {
1735
+ switch (info -> xfer_type ) {
1726
1736
case NAND_OMAP_PREFETCH_POLLED :
1727
1737
nand_chip -> read_buf = omap_read_buf_pref ;
1728
1738
nand_chip -> write_buf = omap_write_buf_pref ;
@@ -1802,7 +1812,7 @@ static int omap_nand_probe(struct platform_device *pdev)
1802
1812
1803
1813
default :
1804
1814
dev_err (& pdev -> dev ,
1805
- "xfer_type(%d) not supported!\n" , pdata -> xfer_type );
1815
+ "xfer_type(%d) not supported!\n" , info -> xfer_type );
1806
1816
err = - EINVAL ;
1807
1817
goto return_error ;
1808
1818
}
0 commit comments