@@ -99,19 +99,26 @@ code value description
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BPF_ADD 0x00 dst += src
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BPF_SUB 0x10 dst -= src
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BPF_MUL 0x20 dst \* = src
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- BPF_DIV 0x30 dst /= src
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+ BPF_DIV 0x30 dst = ( src != 0) ? (dst / src) : 0
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BPF_OR 0x40 dst \| = src
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BPF_AND 0x50 dst &= src
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BPF_LSH 0x60 dst <<= src
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BPF_RSH 0x70 dst >>= src
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BPF_NEG 0x80 dst = ~src
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- BPF_MOD 0x90 dst %= src
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+ BPF_MOD 0x90 dst = ( src != 0) ? (dst % src) : dst
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BPF_XOR 0xa0 dst ^= src
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BPF_MOV 0xb0 dst = src
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BPF_ARSH 0xc0 sign extending shift right
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BPF_END 0xd0 byte swap operations (see `Byte swap instructions `_ below)
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======== ===== ==========================================================
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+ Underflow and overflow are allowed during arithmetic operations, meaning
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+ the 64-bit or 32-bit value will wrap. If eBPF program execution would
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+ result in division by zero, the destination register is instead set to zero.
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+ If execution would result in modulo by zero, for ``BPF_ALU64 `` the value of
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+ the destination register is unchanged whereas for ``BPF_ALU `` the upper
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+ 32 bits of the destination register are zeroed.
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+
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``BPF_ADD | BPF_X | BPF_ALU `` means::
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dst_reg = (u32) dst_reg + (u32) src_reg;
@@ -128,6 +135,11 @@ BPF_END 0xd0 byte swap operations (see `Byte swap instructions`_ below)
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dst_reg = dst_reg ^ imm32
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+ Also note that the division and modulo operations are unsigned. Thus, for
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+ ``BPF_ALU ``, 'imm' is first interpreted as an unsigned 32-bit value, whereas
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+ for ``BPF_ALU64 ``, 'imm' is first sign extended to 64 bits and the result
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+ interpreted as an unsigned 64-bit value. There are no instructions for
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+ signed division or modulo.
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Byte swap instructions
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~~~~~~~~~~~~~~~~~~~~~~
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