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Rohit Khairealexdeucher
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drm/amdgpu: Use PSP to program IH_RB_CNTL_RING1/2 on SRIOV
This is similar to IH_RB_CNTL programming in navi10_ih_toggle_ring_interrupts Signed-off-by: Rohit Khaire <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Horace Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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+17
-5
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2 files changed

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-5
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drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -694,6 +694,8 @@ int psp_reg_program(struct psp_context *psp, enum psp_reg_prog_id reg,
694694

695695
psp_prep_reg_prog_cmd_buf(cmd, reg, value);
696696
ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);
697+
if (ret)
698+
DRM_ERROR("PSP failed to program reg id %d", reg);
697699

698700
kfree(cmd);
699701
return ret;

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

Lines changed: 15 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -120,11 +120,23 @@ force_update_wptr_for_self_int(struct amdgpu_device *adev,
120120
ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL_RING1,
121121
RB_USED_INT_THRESHOLD, threshold);
122122

123-
WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl);
123+
if (amdgpu_sriov_vf(adev) && amdgpu_sriov_reg_indirect_ih(adev)) {
124+
if (psp_reg_program(&adev->psp, PSP_REG_IH_RB_CNTL_RING1, ih_rb_cntl))
125+
return;
126+
} else {
127+
WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl);
128+
}
129+
124130
ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2);
125131
ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL_RING2,
126132
RB_USED_INT_THRESHOLD, threshold);
127-
WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2, ih_rb_cntl);
133+
if (amdgpu_sriov_vf(adev) && amdgpu_sriov_reg_indirect_ih(adev)) {
134+
if (psp_reg_program(&adev->psp, PSP_REG_IH_RB_CNTL_RING2, ih_rb_cntl))
135+
return;
136+
} else {
137+
WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2, ih_rb_cntl);
138+
}
139+
128140
WREG32_SOC15(OSSSYS, 0, mmIH_CNTL2, ih_cntl);
129141
}
130142

@@ -153,10 +165,8 @@ static int navi10_ih_toggle_ring_interrupts(struct amdgpu_device *adev,
153165
tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, ENABLE_INTR, (enable ? 1 : 0));
154166

155167
if (amdgpu_sriov_vf(adev) && amdgpu_sriov_reg_indirect_ih(adev)) {
156-
if (psp_reg_program(&adev->psp, ih_regs->psp_reg_id, tmp)) {
157-
DRM_ERROR("PSP program IH_RB_CNTL failed!\n");
168+
if (psp_reg_program(&adev->psp, ih_regs->psp_reg_id, tmp))
158169
return -ETIMEDOUT;
159-
}
160170
} else {
161171
WREG32(ih_regs->ih_rb_cntl, tmp);
162172
}

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