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shimodaydavem330
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net: sh_eth: remove unnecessary members/definitions
This patch removes unnecessary members in sh_th_private. This patch also removes unnecessary definitions in sh_eth.h Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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+1
-75
lines changed

2 files changed

+1
-75
lines changed

drivers/net/ethernet/renesas/sh_eth.c

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -941,7 +941,6 @@ static int sh_eth_dev_init(struct net_device *ndev)
941941
{
942942
int ret = 0;
943943
struct sh_eth_private *mdp = netdev_priv(ndev);
944-
u_int32_t rx_int_var, tx_int_var;
945944
u32 val;
946945

947946
/* Soft Reset */
@@ -971,9 +970,7 @@ static int sh_eth_dev_init(struct net_device *ndev)
971970
/* Frame recv control */
972971
sh_eth_write(ndev, mdp->cd->rmcr_value, RMCR);
973972

974-
rx_int_var = mdp->rx_int_var = DESC_I_RINT8 | DESC_I_RINT5;
975-
tx_int_var = mdp->tx_int_var = DESC_I_TINT2;
976-
sh_eth_write(ndev, rx_int_var | tx_int_var, TRSCER);
973+
sh_eth_write(ndev, DESC_I_RINT8 | DESC_I_RINT5 | DESC_I_TINT2, TRSCER);
977974

978975
if (mdp->cd->bculr)
979976
sh_eth_write(ndev, 0x800, BCULR); /* Burst sycle set */
@@ -2336,8 +2333,6 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
23362333

23372334
/* debug message level */
23382335
mdp->msg_enable = SH_ETH_DEF_MSG_ENABLE;
2339-
mdp->post_rx = POST_RX >> (devno << 1);
2340-
mdp->post_fw = POST_FW >> (devno << 1);
23412336

23422337
/* read and set MAC address */
23432338
read_mac_address(ndev, pd->mac_addr);

drivers/net/ethernet/renesas/sh_eth.h

Lines changed: 0 additions & 69 deletions
Original file line numberDiff line numberDiff line change
@@ -585,71 +585,6 @@ enum RPADIR_BIT {
585585
/* FDR */
586586
#define DEFAULT_FDR_INIT 0x00000707
587587

588-
enum phy_offsets {
589-
PHY_CTRL = 0, PHY_STAT = 1, PHY_IDT1 = 2, PHY_IDT2 = 3,
590-
PHY_ANA = 4, PHY_ANL = 5, PHY_ANE = 6,
591-
PHY_16 = 16,
592-
};
593-
594-
/* PHY_CTRL */
595-
enum PHY_CTRL_BIT {
596-
PHY_C_RESET = 0x8000, PHY_C_LOOPBK = 0x4000, PHY_C_SPEEDSL = 0x2000,
597-
PHY_C_ANEGEN = 0x1000, PHY_C_PWRDN = 0x0800, PHY_C_ISO = 0x0400,
598-
PHY_C_RANEG = 0x0200, PHY_C_DUPLEX = 0x0100, PHY_C_COLT = 0x0080,
599-
};
600-
#define DM9161_PHY_C_ANEGEN 0 /* auto nego special */
601-
602-
/* PHY_STAT */
603-
enum PHY_STAT_BIT {
604-
PHY_S_100T4 = 0x8000, PHY_S_100X_F = 0x4000, PHY_S_100X_H = 0x2000,
605-
PHY_S_10T_F = 0x1000, PHY_S_10T_H = 0x0800, PHY_S_ANEGC = 0x0020,
606-
PHY_S_RFAULT = 0x0010, PHY_S_ANEGA = 0x0008, PHY_S_LINK = 0x0004,
607-
PHY_S_JAB = 0x0002, PHY_S_EXTD = 0x0001,
608-
};
609-
610-
/* PHY_ANA */
611-
enum PHY_ANA_BIT {
612-
PHY_A_NP = 0x8000, PHY_A_ACK = 0x4000, PHY_A_RF = 0x2000,
613-
PHY_A_FCS = 0x0400, PHY_A_T4 = 0x0200, PHY_A_FDX = 0x0100,
614-
PHY_A_HDX = 0x0080, PHY_A_10FDX = 0x0040, PHY_A_10HDX = 0x0020,
615-
PHY_A_SEL = 0x001e,
616-
};
617-
/* PHY_ANL */
618-
enum PHY_ANL_BIT {
619-
PHY_L_NP = 0x8000, PHY_L_ACK = 0x4000, PHY_L_RF = 0x2000,
620-
PHY_L_FCS = 0x0400, PHY_L_T4 = 0x0200, PHY_L_FDX = 0x0100,
621-
PHY_L_HDX = 0x0080, PHY_L_10FDX = 0x0040, PHY_L_10HDX = 0x0020,
622-
PHY_L_SEL = 0x001f,
623-
};
624-
625-
/* PHY_ANE */
626-
enum PHY_ANE_BIT {
627-
PHY_E_PDF = 0x0010, PHY_E_LPNPA = 0x0008, PHY_E_NPA = 0x0004,
628-
PHY_E_PRX = 0x0002, PHY_E_LPANEGA = 0x0001,
629-
};
630-
631-
/* DM9161 */
632-
enum PHY_16_BIT {
633-
PHY_16_BP4B45 = 0x8000, PHY_16_BPSCR = 0x4000, PHY_16_BPALIGN = 0x2000,
634-
PHY_16_BP_ADPOK = 0x1000, PHY_16_Repeatmode = 0x0800,
635-
PHY_16_TXselect = 0x0400,
636-
PHY_16_Rsvd = 0x0200, PHY_16_RMIIEnable = 0x0100,
637-
PHY_16_Force100LNK = 0x0080,
638-
PHY_16_APDLED_CTL = 0x0040, PHY_16_COLLED_CTL = 0x0020,
639-
PHY_16_RPDCTR_EN = 0x0010,
640-
PHY_16_ResetStMch = 0x0008, PHY_16_PreamSupr = 0x0004,
641-
PHY_16_Sleepmode = 0x0002,
642-
PHY_16_RemoteLoopOut = 0x0001,
643-
};
644-
645-
#define POST_RX 0x08
646-
#define POST_FW 0x04
647-
#define POST0_RX (POST_RX)
648-
#define POST0_FW (POST_FW)
649-
#define POST1_RX (POST_RX >> 2)
650-
#define POST1_FW (POST_FW >> 2)
651-
#define POST_ALL (POST0_RX | POST0_FW | POST1_RX | POST1_FW)
652-
653588
/* ARSTR */
654589
enum ARSTR_BIT { ARSTR_ARSTR = 0x00000001, };
655590

@@ -786,10 +721,6 @@ struct sh_eth_private {
786721
int msg_enable;
787722
int speed;
788723
int duplex;
789-
u32 rx_int_var, tx_int_var; /* interrupt control variables */
790-
char post_rx; /* POST receive */
791-
char post_fw; /* POST forward */
792-
struct net_device_stats tsu_stats; /* TSU forward status */
793724
int port; /* for TSU */
794725
int vlan_num_ids; /* for VLAN tag filter */
795726

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