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Frank Saedavem330
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net: phy: Add dts support for Motorcomm yt8531s gigabit ethernet phy
Add dts support for Motorcomm yt8531s gigabit ethernet phy. Change yt8521_probe to support clk config of yt8531s. Becase yt8521_probe does the things which yt8531s is needed, so removed yt8531s function. This patch has been verified on AM335x platform with yt8531s board. Signed-off-by: Frank Sae <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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drivers/net/phy/motorcomm.c

Lines changed: 27 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -258,8 +258,6 @@
258258
#define YT8531_SCR_CLK_SRC_CLOCK_FROM_DIGITAL 3
259259
#define YT8531_SCR_CLK_SRC_REF_25M 4
260260
#define YT8531_SCR_CLK_SRC_SSC_25M 5
261-
#define YT8531S_SYNCE_CFG_REG 0xA012
262-
#define YT8531S_SCR_SYNCE_ENABLE BIT(6)
263261

264262
/* Extended Register end */
265263

@@ -858,7 +856,32 @@ static int yt8521_probe(struct phy_device *phydev)
858856
return -EINVAL;
859857
}
860858
} else if (phydev->drv->phy_id == PHY_ID_YT8531S) {
861-
return 0;
859+
switch (freq) {
860+
case YTPHY_DTS_OUTPUT_CLK_DIS:
861+
mask = YT8531_SCR_SYNCE_ENABLE;
862+
val = 0;
863+
break;
864+
case YTPHY_DTS_OUTPUT_CLK_25M:
865+
mask = YT8531_SCR_SYNCE_ENABLE |
866+
YT8531_SCR_CLK_SRC_MASK |
867+
YT8531_SCR_CLK_FRE_SEL_125M;
868+
val = YT8531_SCR_SYNCE_ENABLE |
869+
FIELD_PREP(YT8531_SCR_CLK_SRC_MASK,
870+
YT8531_SCR_CLK_SRC_REF_25M);
871+
break;
872+
case YTPHY_DTS_OUTPUT_CLK_125M:
873+
mask = YT8531_SCR_SYNCE_ENABLE |
874+
YT8531_SCR_CLK_SRC_MASK |
875+
YT8531_SCR_CLK_FRE_SEL_125M;
876+
val = YT8531_SCR_SYNCE_ENABLE |
877+
YT8531_SCR_CLK_FRE_SEL_125M |
878+
FIELD_PREP(YT8531_SCR_CLK_SRC_MASK,
879+
YT8531_SCR_CLK_SRC_PLL_125M);
880+
break;
881+
default:
882+
phydev_warn(phydev, "Freq err:%u\n", freq);
883+
return -EINVAL;
884+
}
862885
} else {
863886
phydev_warn(phydev, "PHY id err\n");
864887
return -EINVAL;
@@ -868,26 +891,6 @@ static int yt8521_probe(struct phy_device *phydev)
868891
val);
869892
}
870893

871-
/**
872-
* yt8531s_probe() - read chip config then set suitable polling_mode
873-
* @phydev: a pointer to a &struct phy_device
874-
*
875-
* returns 0 or negative errno code
876-
*/
877-
static int yt8531s_probe(struct phy_device *phydev)
878-
{
879-
int ret;
880-
881-
/* Disable SyncE clock output by default */
882-
ret = ytphy_modify_ext_with_lock(phydev, YT8531S_SYNCE_CFG_REG,
883-
YT8531S_SCR_SYNCE_ENABLE, 0);
884-
if (ret < 0)
885-
return ret;
886-
887-
/* same as yt8521_probe */
888-
return yt8521_probe(phydev);
889-
}
890-
891894
/**
892895
* ytphy_utp_read_lpa() - read LPA then setup lp_advertising for utp
893896
* @phydev: a pointer to a &struct phy_device
@@ -1970,7 +1973,7 @@ static struct phy_driver motorcomm_phy_drvs[] = {
19701973
PHY_ID_MATCH_EXACT(PHY_ID_YT8531S),
19711974
.name = "YT8531S Gigabit Ethernet",
19721975
.get_features = yt8521_get_features,
1973-
.probe = yt8531s_probe,
1976+
.probe = yt8521_probe,
19741977
.read_page = yt8521_read_page,
19751978
.write_page = yt8521_write_page,
19761979
.get_wol = ytphy_get_wol,

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