Skip to content

Commit 413f52f

Browse files
committed
drm/dbi: Support DBI typec1 read operations
Implement SPI reads for typec1, for SPI controllers that can support 9bpw in addition to 8bpw (such as GPIO bit-banged SPI). 9bpw emulation is not supported but we have to start with something. This is used by s6e63m0 to read display MTP information which is used by the driver for backlight control. Reviewed-by: Noralf Trønnes <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
1 parent 440d0f1 commit 413f52f

File tree

1 file changed

+54
-1
lines changed

1 file changed

+54
-1
lines changed

drivers/gpu/drm/drm_mipi_dbi.c

Lines changed: 54 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -928,14 +928,67 @@ static int mipi_dbi_spi1_transfer(struct mipi_dbi *dbi, int dc,
928928
return 0;
929929
}
930930

931+
static int mipi_dbi_typec1_command_read(struct mipi_dbi *dbi, u8 *cmd,
932+
u8 *data, size_t len)
933+
{
934+
struct spi_device *spi = dbi->spi;
935+
u32 speed_hz = min_t(u32, MIPI_DBI_MAX_SPI_READ_SPEED,
936+
spi->max_speed_hz / 2);
937+
struct spi_transfer tr[2] = {
938+
{
939+
.speed_hz = speed_hz,
940+
.bits_per_word = 9,
941+
.tx_buf = dbi->tx_buf9,
942+
.len = 2,
943+
}, {
944+
.speed_hz = speed_hz,
945+
.bits_per_word = 8,
946+
.len = len,
947+
.rx_buf = data,
948+
},
949+
};
950+
struct spi_message m;
951+
u16 *dst16;
952+
int ret;
953+
954+
if (!len)
955+
return -EINVAL;
956+
957+
if (!spi_is_bpw_supported(spi, 9)) {
958+
/*
959+
* FIXME: implement something like mipi_dbi_spi1e_transfer() but
960+
* for reads using emulation.
961+
*/
962+
dev_err(&spi->dev,
963+
"reading on host not supporting 9 bpw not yet implemented\n");
964+
return -EOPNOTSUPP;
965+
}
966+
967+
/*
968+
* Turn the 8bit command into a 16bit version of the command in the
969+
* buffer. Only 9 bits of this will be used when executing the actual
970+
* transfer.
971+
*/
972+
dst16 = dbi->tx_buf9;
973+
dst16[0] = *cmd;
974+
975+
spi_message_init_with_transfers(&m, tr, ARRAY_SIZE(tr));
976+
ret = spi_sync(spi, &m);
977+
978+
if (!ret)
979+
MIPI_DBI_DEBUG_COMMAND(*cmd, data, len);
980+
981+
return ret;
982+
}
983+
931984
static int mipi_dbi_typec1_command(struct mipi_dbi *dbi, u8 *cmd,
932985
u8 *parameters, size_t num)
933986
{
934987
unsigned int bpw = (*cmd == MIPI_DCS_WRITE_MEMORY_START) ? 16 : 8;
935988
int ret;
936989

937990
if (mipi_dbi_command_is_read(dbi, *cmd))
938-
return -EOPNOTSUPP;
991+
return mipi_dbi_typec1_command_read(dbi, cmd, parameters, num);
939992

940993
MIPI_DBI_DEBUG_COMMAND(*cmd, parameters, num);
941994

0 commit comments

Comments
 (0)