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1 parent 78615c4 commit 4ea57ceCopy full SHA for 4ea57ce
arch/microblaze/include/asm/cache.h
@@ -18,4 +18,9 @@
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#define SMP_CACHE_BYTES L1_CACHE_BYTES
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+/* MS be sure that SLAB allocates aligned objects */
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+#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
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+
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+#define ARCH_SLAB_MINALIGN L1_CACHE_BYTES
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#endif /* _ASM_MICROBLAZE_CACHE_H */
arch/microblaze/include/asm/page.h
@@ -30,11 +30,6 @@
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#ifndef __ASSEMBLY__
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-/* MS be sure that SLAB allocates aligned objects */
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-#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
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-
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-#define ARCH_SLAB_MINALIGN L1_CACHE_BYTES
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/*
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* PAGE_OFFSET -- the first address of the first page of memory. With MMU
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* it is set to the kernel start address (aligned on a page boundary).
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