|
17 | 17 | #include <asm/firmware.h>
|
18 | 18 | #include <asm/ptrace.h>
|
19 | 19 | #include <asm/code-patching.h>
|
| 20 | +#include <asm/hw_irq.h> |
20 | 21 | #include <asm/interrupt.h>
|
21 | 22 |
|
22 | 23 | #ifdef CONFIG_PPC64
|
@@ -2437,6 +2438,36 @@ static void perf_event_interrupt(struct pt_regs *regs)
|
2437 | 2438 | perf_sample_event_took(sched_clock() - start_clock);
|
2438 | 2439 | }
|
2439 | 2440 |
|
| 2441 | +/* |
| 2442 | + * If the perf subsystem wants performance monitor interrupts as soon as |
| 2443 | + * possible (e.g., to sample the instruction address and stack chain), |
| 2444 | + * this should return true. The IRQ masking code can then enable MSR[EE] |
| 2445 | + * in some places (e.g., interrupt handlers) that allows PMI interrupts |
| 2446 | + * though to improve accuracy of profiles, at the cost of some performance. |
| 2447 | + * |
| 2448 | + * The PMU counters can be enabled by other means (e.g., sysfs raw SPR |
| 2449 | + * access), but in that case there is no need for prompt PMI handling. |
| 2450 | + * |
| 2451 | + * This currently returns true if any perf counter is being used. It |
| 2452 | + * could possibly return false if only events are being counted rather than |
| 2453 | + * samples being taken, but for now this is good enough. |
| 2454 | + */ |
| 2455 | +bool power_pmu_wants_prompt_pmi(void) |
| 2456 | +{ |
| 2457 | + struct cpu_hw_events *cpuhw; |
| 2458 | + |
| 2459 | + /* |
| 2460 | + * This could simply test local_paca->pmcregs_in_use if that were not |
| 2461 | + * under ifdef KVM. |
| 2462 | + */ |
| 2463 | + |
| 2464 | + if (!ppmu) |
| 2465 | + return false; |
| 2466 | + |
| 2467 | + cpuhw = this_cpu_ptr(&cpu_hw_events); |
| 2468 | + return cpuhw->n_events; |
| 2469 | +} |
| 2470 | + |
2440 | 2471 | static int power_pmu_prepare_cpu(unsigned int cpu)
|
2441 | 2472 | {
|
2442 | 2473 | struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);
|
|
0 commit comments