|
12 | 12 | #include <linux/notifier.h>
|
13 | 13 | #include <linux/pm_runtime.h>
|
14 | 14 | #include <linux/spinlock.h>
|
| 15 | +#include <linux/delay.h> |
15 | 16 |
|
16 | 17 | #include <asm/set_memory.h>
|
17 | 18 |
|
@@ -91,6 +92,36 @@ MODULE_DEVICE_TABLE(pci, pciidlist);
|
91 | 92 | static const struct drm_ioctl_desc psb_ioctls[] = {
|
92 | 93 | };
|
93 | 94 |
|
| 95 | +/** |
| 96 | + * psb_spank - reset the 2D engine |
| 97 | + * @dev_priv: our PSB DRM device |
| 98 | + * |
| 99 | + * Soft reset the graphics engine and then reload the necessary registers. |
| 100 | + */ |
| 101 | +void psb_spank(struct drm_psb_private *dev_priv) |
| 102 | +{ |
| 103 | + PSB_WSGX32(_PSB_CS_RESET_BIF_RESET | _PSB_CS_RESET_DPM_RESET | |
| 104 | + _PSB_CS_RESET_TA_RESET | _PSB_CS_RESET_USE_RESET | |
| 105 | + _PSB_CS_RESET_ISP_RESET | _PSB_CS_RESET_TSP_RESET | |
| 106 | + _PSB_CS_RESET_TWOD_RESET, PSB_CR_SOFT_RESET); |
| 107 | + PSB_RSGX32(PSB_CR_SOFT_RESET); |
| 108 | + |
| 109 | + msleep(1); |
| 110 | + |
| 111 | + PSB_WSGX32(0, PSB_CR_SOFT_RESET); |
| 112 | + wmb(); |
| 113 | + PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_CB_CTRL_CLEAR_FAULT, |
| 114 | + PSB_CR_BIF_CTRL); |
| 115 | + wmb(); |
| 116 | + (void) PSB_RSGX32(PSB_CR_BIF_CTRL); |
| 117 | + |
| 118 | + msleep(1); |
| 119 | + PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_CB_CTRL_CLEAR_FAULT, |
| 120 | + PSB_CR_BIF_CTRL); |
| 121 | + (void) PSB_RSGX32(PSB_CR_BIF_CTRL); |
| 122 | + PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE); |
| 123 | +} |
| 124 | + |
94 | 125 | static int psb_do_init(struct drm_device *dev)
|
95 | 126 | {
|
96 | 127 | struct drm_psb_private *dev_priv = dev->dev_private;
|
|
0 commit comments