We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 3684b03 commit 70b5b18Copy full SHA for 70b5b18
arch/x86/platform/intel-mid/pwr.c
@@ -44,6 +44,10 @@
44
/* Bits in PM_CMD */
45
#define PM_CMD_CMD(x) ((x) << 0)
46
#define PM_CMD_IOC (1 << 8)
47
+#define PM_CMD_CM_NOP (0 << 9)
48
+#define PM_CMD_CM_IMMEDIATE (1 << 9)
49
+#define PM_CMD_CM_DELAY (2 << 9)
50
+#define PM_CMD_CM_TRIGGER (3 << 9)
51
#define PM_CMD_D3cold (1 << 21)
52
53
/* List of commands */
@@ -137,7 +141,7 @@ static int mid_pwr_wait(struct mid_pwr *pwr)
137
141
138
142
static int mid_pwr_wait_for_cmd(struct mid_pwr *pwr, u8 cmd)
139
143
{
140
- writel(PM_CMD_CMD(cmd), pwr->regs + PM_CMD);
144
+ writel(PM_CMD_CMD(cmd) | PM_CMD_CM_IMMEDIATE, pwr->regs + PM_CMD);
145
return mid_pwr_wait(pwr);
146
}
147
0 commit comments