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airliedairlied
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Merge tag 'drm-misc-fixes-2021-10-21-1' of git://anongit.freedesktop.org/drm/drm-misc into drm-fixes
drm-misc-fixes for v5.15-rc7: - Rebased, to remove vc4 patches. - Fix mxsfb crash on unload. - Use correct sync parameters for Feixin K101-IM2BYL02. - Assorted kmb modeset/atomic fixes. Signed-off-by: Dave Airlie <[email protected]> From: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2 parents 730b64d + 7405609 commit 7e1c544

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9 files changed

+123
-24
lines changed

9 files changed

+123
-24
lines changed

‎drivers/gpu/drm/kmb/kmb_crtc.c

Lines changed: 38 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -66,7 +66,8 @@ static const struct drm_crtc_funcs kmb_crtc_funcs = {
6666
.disable_vblank = kmb_crtc_disable_vblank,
6767
};
6868

69-
static void kmb_crtc_set_mode(struct drm_crtc *crtc)
69+
static void kmb_crtc_set_mode(struct drm_crtc *crtc,
70+
struct drm_atomic_state *old_state)
7071
{
7172
struct drm_device *dev = crtc->dev;
7273
struct drm_display_mode *m = &crtc->state->adjusted_mode;
@@ -75,7 +76,7 @@ static void kmb_crtc_set_mode(struct drm_crtc *crtc)
7576
unsigned int val = 0;
7677

7778
/* Initialize mipi */
78-
kmb_dsi_mode_set(kmb->kmb_dsi, m, kmb->sys_clk_mhz);
79+
kmb_dsi_mode_set(kmb->kmb_dsi, m, kmb->sys_clk_mhz, old_state);
7980
drm_info(dev,
8081
"vfp= %d vbp= %d vsync_len=%d hfp=%d hbp=%d hsync_len=%d\n",
8182
m->crtc_vsync_start - m->crtc_vdisplay,
@@ -138,7 +139,7 @@ static void kmb_crtc_atomic_enable(struct drm_crtc *crtc,
138139
struct kmb_drm_private *kmb = crtc_to_kmb_priv(crtc);
139140

140141
clk_prepare_enable(kmb->kmb_clk.clk_lcd);
141-
kmb_crtc_set_mode(crtc);
142+
kmb_crtc_set_mode(crtc, state);
142143
drm_crtc_vblank_on(crtc);
143144
}
144145

@@ -185,11 +186,45 @@ static void kmb_crtc_atomic_flush(struct drm_crtc *crtc,
185186
spin_unlock_irq(&crtc->dev->event_lock);
186187
}
187188

189+
static enum drm_mode_status
190+
kmb_crtc_mode_valid(struct drm_crtc *crtc,
191+
const struct drm_display_mode *mode)
192+
{
193+
int refresh;
194+
struct drm_device *dev = crtc->dev;
195+
int vfp = mode->vsync_start - mode->vdisplay;
196+
197+
if (mode->vdisplay < KMB_CRTC_MAX_HEIGHT) {
198+
drm_dbg(dev, "height = %d less than %d",
199+
mode->vdisplay, KMB_CRTC_MAX_HEIGHT);
200+
return MODE_BAD_VVALUE;
201+
}
202+
if (mode->hdisplay < KMB_CRTC_MAX_WIDTH) {
203+
drm_dbg(dev, "width = %d less than %d",
204+
mode->hdisplay, KMB_CRTC_MAX_WIDTH);
205+
return MODE_BAD_HVALUE;
206+
}
207+
refresh = drm_mode_vrefresh(mode);
208+
if (refresh < KMB_MIN_VREFRESH || refresh > KMB_MAX_VREFRESH) {
209+
drm_dbg(dev, "refresh = %d less than %d or greater than %d",
210+
refresh, KMB_MIN_VREFRESH, KMB_MAX_VREFRESH);
211+
return MODE_BAD;
212+
}
213+
214+
if (vfp < KMB_CRTC_MIN_VFP) {
215+
drm_dbg(dev, "vfp = %d less than %d", vfp, KMB_CRTC_MIN_VFP);
216+
return MODE_BAD;
217+
}
218+
219+
return MODE_OK;
220+
}
221+
188222
static const struct drm_crtc_helper_funcs kmb_crtc_helper_funcs = {
189223
.atomic_begin = kmb_crtc_atomic_begin,
190224
.atomic_enable = kmb_crtc_atomic_enable,
191225
.atomic_disable = kmb_crtc_atomic_disable,
192226
.atomic_flush = kmb_crtc_atomic_flush,
227+
.mode_valid = kmb_crtc_mode_valid,
193228
};
194229

195230
int kmb_setup_crtc(struct drm_device *drm)

‎drivers/gpu/drm/kmb/kmb_drv.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -380,7 +380,7 @@ static irqreturn_t handle_lcd_irq(struct drm_device *dev)
380380
if (val & LAYER3_DMA_FIFO_UNDERFLOW)
381381
drm_dbg(&kmb->drm,
382382
"LAYER3:GL1 DMA UNDERFLOW val = 0x%lx", val);
383-
if (val & LAYER3_DMA_FIFO_UNDERFLOW)
383+
if (val & LAYER3_DMA_FIFO_OVERFLOW)
384384
drm_dbg(&kmb->drm,
385385
"LAYER3:GL1 DMA OVERFLOW val = 0x%lx", val);
386386
}

‎drivers/gpu/drm/kmb/kmb_drv.h

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,11 +20,18 @@
2020
#define DRIVER_MAJOR 1
2121
#define DRIVER_MINOR 1
2222

23+
/* Platform definitions */
24+
#define KMB_CRTC_MIN_VFP 4
25+
#define KMB_CRTC_MAX_WIDTH 1920 /* max width in pixels */
26+
#define KMB_CRTC_MAX_HEIGHT 1080 /* max height in pixels */
27+
#define KMB_CRTC_MIN_WIDTH 1920
28+
#define KMB_CRTC_MIN_HEIGHT 1080
2329
#define KMB_FB_MAX_WIDTH 1920
2430
#define KMB_FB_MAX_HEIGHT 1080
2531
#define KMB_FB_MIN_WIDTH 1
2632
#define KMB_FB_MIN_HEIGHT 1
27-
33+
#define KMB_MIN_VREFRESH 59 /*vertical refresh in Hz */
34+
#define KMB_MAX_VREFRESH 60 /*vertical refresh in Hz */
2835
#define KMB_LCD_DEFAULT_CLK 200000000
2936
#define KMB_SYS_CLK_MHZ 500
3037

@@ -50,6 +57,7 @@ struct kmb_drm_private {
5057
spinlock_t irq_lock;
5158
int irq_lcd;
5259
int sys_clk_mhz;
60+
struct disp_cfg init_disp_cfg[KMB_MAX_PLANES];
5361
struct layer_status plane_status[KMB_MAX_PLANES];
5462
int kmb_under_flow;
5563
int kmb_flush_done;

‎drivers/gpu/drm/kmb/kmb_dsi.c

Lines changed: 15 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -482,6 +482,10 @@ static u32 mipi_tx_fg_section_cfg(struct kmb_dsi *kmb_dsi,
482482
return 0;
483483
}
484484

485+
#define CLK_DIFF_LOW 50
486+
#define CLK_DIFF_HI 60
487+
#define SYSCLK_500 500
488+
485489
static void mipi_tx_fg_cfg_regs(struct kmb_dsi *kmb_dsi, u8 frame_gen,
486490
struct mipi_tx_frame_timing_cfg *fg_cfg)
487491
{
@@ -492,7 +496,12 @@ static void mipi_tx_fg_cfg_regs(struct kmb_dsi *kmb_dsi, u8 frame_gen,
492496
/* 500 Mhz system clock minus 50 to account for the difference in
493497
* MIPI clock speed in RTL tests
494498
*/
495-
sysclk = kmb_dsi->sys_clk_mhz - 50;
499+
if (kmb_dsi->sys_clk_mhz == SYSCLK_500) {
500+
sysclk = kmb_dsi->sys_clk_mhz - CLK_DIFF_LOW;
501+
} else {
502+
/* 700 Mhz clk*/
503+
sysclk = kmb_dsi->sys_clk_mhz - CLK_DIFF_HI;
504+
}
496505

497506
/* PPL-Pixel Packing Layer, LLP-Low Level Protocol
498507
* Frame genartor timing parameters are clocked on the system clock,
@@ -1322,7 +1331,8 @@ static u32 mipi_tx_init_dphy(struct kmb_dsi *kmb_dsi,
13221331
return 0;
13231332
}
13241333

1325-
static void connect_lcd_to_mipi(struct kmb_dsi *kmb_dsi)
1334+
static void connect_lcd_to_mipi(struct kmb_dsi *kmb_dsi,
1335+
struct drm_atomic_state *old_state)
13261336
{
13271337
struct regmap *msscam;
13281338

@@ -1331,7 +1341,7 @@ static void connect_lcd_to_mipi(struct kmb_dsi *kmb_dsi)
13311341
dev_dbg(kmb_dsi->dev, "failed to get msscam syscon");
13321342
return;
13331343
}
1334-
1344+
drm_atomic_bridge_chain_enable(adv_bridge, old_state);
13351345
/* DISABLE MIPI->CIF CONNECTION */
13361346
regmap_write(msscam, MSS_MIPI_CIF_CFG, 0);
13371347

@@ -1342,7 +1352,7 @@ static void connect_lcd_to_mipi(struct kmb_dsi *kmb_dsi)
13421352
}
13431353

13441354
int kmb_dsi_mode_set(struct kmb_dsi *kmb_dsi, struct drm_display_mode *mode,
1345-
int sys_clk_mhz)
1355+
int sys_clk_mhz, struct drm_atomic_state *old_state)
13461356
{
13471357
u64 data_rate;
13481358

@@ -1384,18 +1394,13 @@ int kmb_dsi_mode_set(struct kmb_dsi *kmb_dsi, struct drm_display_mode *mode,
13841394
mipi_tx_init_cfg.lane_rate_mbps = data_rate;
13851395
}
13861396

1387-
kmb_write_mipi(kmb_dsi, DPHY_ENABLE, 0);
1388-
kmb_write_mipi(kmb_dsi, DPHY_INIT_CTRL0, 0);
1389-
kmb_write_mipi(kmb_dsi, DPHY_INIT_CTRL1, 0);
1390-
kmb_write_mipi(kmb_dsi, DPHY_INIT_CTRL2, 0);
1391-
13921397
/* Initialize mipi controller */
13931398
mipi_tx_init_cntrl(kmb_dsi, &mipi_tx_init_cfg);
13941399

13951400
/* Dphy initialization */
13961401
mipi_tx_init_dphy(kmb_dsi, &mipi_tx_init_cfg);
13971402

1398-
connect_lcd_to_mipi(kmb_dsi);
1403+
connect_lcd_to_mipi(kmb_dsi, old_state);
13991404
dev_info(kmb_dsi->dev, "mipi hw initialized");
14001405

14011406
return 0;

‎drivers/gpu/drm/kmb/kmb_dsi.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -380,7 +380,7 @@ int kmb_dsi_host_bridge_init(struct device *dev);
380380
struct kmb_dsi *kmb_dsi_init(struct platform_device *pdev);
381381
void kmb_dsi_host_unregister(struct kmb_dsi *kmb_dsi);
382382
int kmb_dsi_mode_set(struct kmb_dsi *kmb_dsi, struct drm_display_mode *mode,
383-
int sys_clk_mhz);
383+
int sys_clk_mhz, struct drm_atomic_state *old_state);
384384
int kmb_dsi_map_mmio(struct kmb_dsi *kmb_dsi);
385385
int kmb_dsi_clk_init(struct kmb_dsi *kmb_dsi);
386386
int kmb_dsi_encoder_init(struct drm_device *dev, struct kmb_dsi *kmb_dsi);

‎drivers/gpu/drm/kmb/kmb_plane.c

Lines changed: 42 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -67,8 +67,21 @@ static const u32 kmb_formats_v[] = {
6767

6868
static unsigned int check_pixel_format(struct drm_plane *plane, u32 format)
6969
{
70+
struct kmb_drm_private *kmb;
71+
struct kmb_plane *kmb_plane = to_kmb_plane(plane);
7072
int i;
73+
int plane_id = kmb_plane->id;
74+
struct disp_cfg init_disp_cfg;
7175

76+
kmb = to_kmb(plane->dev);
77+
init_disp_cfg = kmb->init_disp_cfg[plane_id];
78+
/* Due to HW limitations, changing pixel format after initial
79+
* plane configuration is not supported.
80+
*/
81+
if (init_disp_cfg.format && init_disp_cfg.format != format) {
82+
drm_dbg(&kmb->drm, "Cannot change format after initial plane configuration");
83+
return -EINVAL;
84+
}
7285
for (i = 0; i < plane->format_count; i++) {
7386
if (plane->format_types[i] == format)
7487
return 0;
@@ -81,11 +94,17 @@ static int kmb_plane_atomic_check(struct drm_plane *plane,
8194
{
8295
struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
8396
plane);
97+
struct kmb_drm_private *kmb;
98+
struct kmb_plane *kmb_plane = to_kmb_plane(plane);
99+
int plane_id = kmb_plane->id;
100+
struct disp_cfg init_disp_cfg;
84101
struct drm_framebuffer *fb;
85102
int ret;
86103
struct drm_crtc_state *crtc_state;
87104
bool can_position;
88105

106+
kmb = to_kmb(plane->dev);
107+
init_disp_cfg = kmb->init_disp_cfg[plane_id];
89108
fb = new_plane_state->fb;
90109
if (!fb || !new_plane_state->crtc)
91110
return 0;
@@ -99,6 +118,16 @@ static int kmb_plane_atomic_check(struct drm_plane *plane,
99118
new_plane_state->crtc_w < KMB_FB_MIN_WIDTH ||
100119
new_plane_state->crtc_h < KMB_FB_MIN_HEIGHT)
101120
return -EINVAL;
121+
122+
/* Due to HW limitations, changing plane height or width after
123+
* initial plane configuration is not supported.
124+
*/
125+
if ((init_disp_cfg.width && init_disp_cfg.height) &&
126+
(init_disp_cfg.width != fb->width ||
127+
init_disp_cfg.height != fb->height)) {
128+
drm_dbg(&kmb->drm, "Cannot change plane height or width after initial configuration");
129+
return -EINVAL;
130+
}
102131
can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY);
103132
crtc_state =
104133
drm_atomic_get_existing_crtc_state(state,
@@ -335,6 +364,7 @@ static void kmb_plane_atomic_update(struct drm_plane *plane,
335364
unsigned char plane_id;
336365
int num_planes;
337366
static dma_addr_t addr[MAX_SUB_PLANES];
367+
struct disp_cfg *init_disp_cfg;
338368

339369
if (!plane || !new_plane_state || !old_plane_state)
340370
return;
@@ -357,7 +387,8 @@ static void kmb_plane_atomic_update(struct drm_plane *plane,
357387
}
358388
spin_unlock_irq(&kmb->irq_lock);
359389

360-
src_w = (new_plane_state->src_w >> 16);
390+
init_disp_cfg = &kmb->init_disp_cfg[plane_id];
391+
src_w = new_plane_state->src_w >> 16;
361392
src_h = new_plane_state->src_h >> 16;
362393
crtc_x = new_plane_state->crtc_x;
363394
crtc_y = new_plane_state->crtc_y;
@@ -500,6 +531,16 @@ static void kmb_plane_atomic_update(struct drm_plane *plane,
500531

501532
/* Enable DMA */
502533
kmb_write_lcd(kmb, LCD_LAYERn_DMA_CFG(plane_id), dma_cfg);
534+
535+
/* Save initial display config */
536+
if (!init_disp_cfg->width ||
537+
!init_disp_cfg->height ||
538+
!init_disp_cfg->format) {
539+
init_disp_cfg->width = width;
540+
init_disp_cfg->height = height;
541+
init_disp_cfg->format = fb->format->format;
542+
}
543+
503544
drm_dbg(&kmb->drm, "dma_cfg=0x%x LCD_DMA_CFG=0x%x\n", dma_cfg,
504545
kmb_read_lcd(kmb, LCD_LAYERn_DMA_CFG(plane_id)));
505546

‎drivers/gpu/drm/kmb/kmb_plane.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -63,6 +63,12 @@ struct layer_status {
6363
u32 ctrl;
6464
};
6565

66+
struct disp_cfg {
67+
unsigned int width;
68+
unsigned int height;
69+
unsigned int format;
70+
};
71+
6672
struct kmb_plane *kmb_plane_init(struct drm_device *drm);
6773
void kmb_plane_destroy(struct drm_plane *plane);
6874
#endif /* __KMB_PLANE_H__ */

‎drivers/gpu/drm/mxsfb/mxsfb_drv.c

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -173,7 +173,11 @@ static void mxsfb_irq_disable(struct drm_device *drm)
173173
struct mxsfb_drm_private *mxsfb = drm->dev_private;
174174

175175
mxsfb_enable_axi_clk(mxsfb);
176-
mxsfb->crtc.funcs->disable_vblank(&mxsfb->crtc);
176+
177+
/* Disable and clear VBLANK IRQ */
178+
writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_CLR);
179+
writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR);
180+
177181
mxsfb_disable_axi_clk(mxsfb);
178182
}
179183

‎drivers/gpu/drm/panel/panel-ilitek-ili9881c.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -590,14 +590,14 @@ static const struct drm_display_mode k101_im2byl02_default_mode = {
590590
.clock = 69700,
591591

592592
.hdisplay = 800,
593-
.hsync_start = 800 + 6,
594-
.hsync_end = 800 + 6 + 15,
595-
.htotal = 800 + 6 + 15 + 16,
593+
.hsync_start = 800 + 52,
594+
.hsync_end = 800 + 52 + 8,
595+
.htotal = 800 + 52 + 8 + 48,
596596

597597
.vdisplay = 1280,
598-
.vsync_start = 1280 + 8,
599-
.vsync_end = 1280 + 8 + 48,
600-
.vtotal = 1280 + 8 + 48 + 52,
598+
.vsync_start = 1280 + 16,
599+
.vsync_end = 1280 + 16 + 6,
600+
.vtotal = 1280 + 16 + 6 + 15,
601601

602602
.width_mm = 135,
603603
.height_mm = 217,

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