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Merge tag 'mlx5-updates-2020-04-20' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux
Saeed Mahameed says: ==================== mlx5-updates-2020-04-20 This series includes misc updates and clean ups to mlx5 driver: 1) improve some comments from Hu Haowen. 2) Handles errors of netif_set_real_num_{tx,rx}_queues, from Maxim 3) IPsec and FPGA related code cleanup to prepare for ASIC devices IPsec offloads, from Raed 4) Allow partial mask for tunnel options, from Roi. ==================== Signed-off-by: David S. Miller <[email protected]>
2 parents 794867e + 6533380 commit 80ad41f

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18 files changed

+242
-184
lines changed

18 files changed

+242
-184
lines changed

‎drivers/net/ethernet/mellanox/mlx5/core/accel/ipsec.c

Lines changed: 14 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -58,12 +58,21 @@ int mlx5_accel_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
5858

5959
void *mlx5_accel_esp_create_hw_context(struct mlx5_core_dev *mdev,
6060
struct mlx5_accel_esp_xfrm *xfrm,
61-
const __be32 saddr[4],
62-
const __be32 daddr[4],
63-
const __be32 spi, bool is_ipv6)
61+
u32 *sa_handle)
6462
{
65-
return mlx5_fpga_ipsec_create_sa_ctx(mdev, xfrm, saddr, daddr,
66-
spi, is_ipv6);
63+
__be32 saddr[4] = {}, daddr[4] = {};
64+
65+
if (!xfrm->attrs.is_ipv6) {
66+
saddr[3] = xfrm->attrs.saddr.a4;
67+
daddr[3] = xfrm->attrs.daddr.a4;
68+
} else {
69+
memcpy(saddr, xfrm->attrs.saddr.a6, sizeof(saddr));
70+
memcpy(daddr, xfrm->attrs.daddr.a6, sizeof(daddr));
71+
}
72+
73+
return mlx5_fpga_ipsec_create_sa_ctx(mdev, xfrm, saddr,
74+
daddr, xfrm->attrs.spi,
75+
xfrm->attrs.is_ipv6, sa_handle);
6776
}
6877

6978
void mlx5_accel_esp_free_hw_context(void *context)

‎drivers/net/ethernet/mellanox/mlx5/core/accel/ipsec.h

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -48,9 +48,7 @@ int mlx5_accel_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
4848

4949
void *mlx5_accel_esp_create_hw_context(struct mlx5_core_dev *mdev,
5050
struct mlx5_accel_esp_xfrm *xfrm,
51-
const __be32 saddr[4],
52-
const __be32 daddr[4],
53-
const __be32 spi, bool is_ipv6);
51+
u32 *sa_handle);
5452
void mlx5_accel_esp_free_hw_context(void *context);
5553

5654
int mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev);
@@ -64,9 +62,7 @@ void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev);
6462
static inline void *
6563
mlx5_accel_esp_create_hw_context(struct mlx5_core_dev *mdev,
6664
struct mlx5_accel_esp_xfrm *xfrm,
67-
const __be32 saddr[4],
68-
const __be32 daddr[4],
69-
const __be32 spi, bool is_ipv6)
65+
u32 *sa_handle)
7066
{
7167
return NULL;
7268
}

‎drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -684,7 +684,7 @@ static void mlx5_fw_tracer_handle_traces(struct work_struct *work)
684684
get_block_timestamp(tracer, &tmp_trace_block[TRACES_PER_BLOCK - 1]);
685685

686686
while (block_timestamp > tracer->last_timestamp) {
687-
/* Check block override if its not the first block */
687+
/* Check block override if it's not the first block */
688688
if (!tracer->last_timestamp) {
689689
u64 *ts_event;
690690
/* To avoid block override be the HW in case of buffer

‎drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -102,7 +102,7 @@ static inline void
102102
mlx5e_notify_hw(struct mlx5_wq_cyc *wq, u16 pc, void __iomem *uar_map,
103103
struct mlx5_wqe_ctrl_seg *ctrl)
104104
{
105-
ctrl->fm_ce_se = MLX5_WQE_CTRL_CQ_UPDATE;
105+
ctrl->fm_ce_se |= MLX5_WQE_CTRL_CQ_UPDATE;
106106
/* ensure wqe is visible to device before updating doorbell record */
107107
dma_wmb();
108108

‎drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -42,6 +42,8 @@
4242
#include "en/txrx.h"
4343

4444
#if IS_ENABLED(CONFIG_GENEVE)
45+
#include <net/geneve.h>
46+
4547
static inline bool mlx5_geneve_tx_allowed(struct mlx5_core_dev *mdev)
4648
{
4749
return mlx5_tx_swp_supported(mdev);

‎drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c

Lines changed: 35 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -75,18 +75,23 @@ struct xfrm_state *mlx5e_ipsec_sadb_rx_lookup(struct mlx5e_ipsec *ipsec,
7575
return ret;
7676
}
7777

78-
static int mlx5e_ipsec_sadb_rx_add(struct mlx5e_ipsec_sa_entry *sa_entry)
78+
static int mlx5e_ipsec_sadb_rx_add(struct mlx5e_ipsec_sa_entry *sa_entry,
79+
unsigned int handle)
7980
{
8081
struct mlx5e_ipsec *ipsec = sa_entry->ipsec;
82+
struct mlx5e_ipsec_sa_entry *_sa_entry;
8183
unsigned long flags;
82-
int ret;
8384

84-
ret = ida_simple_get(&ipsec->halloc, 1, 0, GFP_KERNEL);
85-
if (ret < 0)
86-
return ret;
85+
rcu_read_lock();
86+
hash_for_each_possible_rcu(ipsec->sadb_rx, _sa_entry, hlist, handle)
87+
if (_sa_entry->handle == handle) {
88+
rcu_read_unlock();
89+
return -EEXIST;
90+
}
91+
rcu_read_unlock();
8792

8893
spin_lock_irqsave(&ipsec->sadb_rx_lock, flags);
89-
sa_entry->handle = ret;
94+
sa_entry->handle = handle;
9095
hash_add_rcu(ipsec->sadb_rx, &sa_entry->hlist, sa_entry->handle);
9196
spin_unlock_irqrestore(&ipsec->sadb_rx_lock, flags);
9297

@@ -103,15 +108,6 @@ static void mlx5e_ipsec_sadb_rx_del(struct mlx5e_ipsec_sa_entry *sa_entry)
103108
spin_unlock_irqrestore(&ipsec->sadb_rx_lock, flags);
104109
}
105110

106-
static void mlx5e_ipsec_sadb_rx_free(struct mlx5e_ipsec_sa_entry *sa_entry)
107-
{
108-
struct mlx5e_ipsec *ipsec = sa_entry->ipsec;
109-
110-
/* xfrm already doing sync rcu between del and free callbacks */
111-
112-
ida_simple_remove(&ipsec->halloc, sa_entry->handle);
113-
}
114-
115111
static bool mlx5e_ipsec_update_esn_state(struct mlx5e_ipsec_sa_entry *sa_entry)
116112
{
117113
struct xfrm_replay_state_esn *replay_esn;
@@ -199,6 +195,14 @@ mlx5e_ipsec_build_accel_xfrm_attrs(struct mlx5e_ipsec_sa_entry *sa_entry,
199195
attrs->flags |= (x->props.mode == XFRM_MODE_TRANSPORT) ?
200196
MLX5_ACCEL_ESP_FLAGS_TRANSPORT :
201197
MLX5_ACCEL_ESP_FLAGS_TUNNEL;
198+
199+
/* spi */
200+
attrs->spi = x->id.spi;
201+
202+
/* source , destination ips */
203+
memcpy(&attrs->saddr, x->props.saddr.a6, sizeof(attrs->saddr));
204+
memcpy(&attrs->daddr, x->id.daddr.a6, sizeof(attrs->daddr));
205+
attrs->is_ipv6 = (x->props.family != AF_INET);
202206
}
203207

204208
static inline int mlx5e_xfrm_validate_state(struct xfrm_state *x)
@@ -284,8 +288,7 @@ static int mlx5e_xfrm_add_state(struct xfrm_state *x)
284288
struct net_device *netdev = x->xso.dev;
285289
struct mlx5_accel_esp_xfrm_attrs attrs;
286290
struct mlx5e_priv *priv;
287-
__be32 saddr[4] = {0}, daddr[4] = {0}, spi;
288-
bool is_ipv6 = false;
291+
unsigned int sa_handle;
289292
int err;
290293

291294
priv = netdev_priv(netdev);
@@ -303,20 +306,6 @@ static int mlx5e_xfrm_add_state(struct xfrm_state *x)
303306
sa_entry->x = x;
304307
sa_entry->ipsec = priv->ipsec;
305308

306-
/* Add the SA to handle processed incoming packets before the add SA
307-
* completion was received
308-
*/
309-
if (x->xso.flags & XFRM_OFFLOAD_INBOUND) {
310-
err = mlx5e_ipsec_sadb_rx_add(sa_entry);
311-
if (err) {
312-
netdev_info(netdev, "Failed adding to SADB_RX: %d\n", err);
313-
goto err_entry;
314-
}
315-
} else {
316-
sa_entry->set_iv_op = (x->props.flags & XFRM_STATE_ESN) ?
317-
mlx5e_ipsec_set_iv_esn : mlx5e_ipsec_set_iv;
318-
}
319-
320309
/* check esn */
321310
mlx5e_ipsec_update_esn_state(sa_entry);
322311

@@ -327,41 +316,38 @@ static int mlx5e_xfrm_add_state(struct xfrm_state *x)
327316
MLX5_ACCEL_XFRM_FLAG_REQUIRE_METADATA);
328317
if (IS_ERR(sa_entry->xfrm)) {
329318
err = PTR_ERR(sa_entry->xfrm);
330-
goto err_sadb_rx;
319+
goto err_sa_entry;
331320
}
332321

333322
/* create hw context */
334-
if (x->props.family == AF_INET) {
335-
saddr[3] = x->props.saddr.a4;
336-
daddr[3] = x->id.daddr.a4;
337-
} else {
338-
memcpy(saddr, x->props.saddr.a6, sizeof(saddr));
339-
memcpy(daddr, x->id.daddr.a6, sizeof(daddr));
340-
is_ipv6 = true;
341-
}
342-
spi = x->id.spi;
343323
sa_entry->hw_context =
344324
mlx5_accel_esp_create_hw_context(priv->mdev,
345325
sa_entry->xfrm,
346-
saddr, daddr, spi,
347-
is_ipv6);
326+
&sa_handle);
348327
if (IS_ERR(sa_entry->hw_context)) {
349328
err = PTR_ERR(sa_entry->hw_context);
350329
goto err_xfrm;
351330
}
352331

332+
if (x->xso.flags & XFRM_OFFLOAD_INBOUND) {
333+
err = mlx5e_ipsec_sadb_rx_add(sa_entry, sa_handle);
334+
if (err)
335+
goto err_hw_ctx;
336+
} else {
337+
sa_entry->set_iv_op = (x->props.flags & XFRM_STATE_ESN) ?
338+
mlx5e_ipsec_set_iv_esn : mlx5e_ipsec_set_iv;
339+
}
340+
353341
x->xso.offload_handle = (unsigned long)sa_entry;
354342
goto out;
355343

344+
err_hw_ctx:
345+
mlx5_accel_esp_free_hw_context(sa_entry->hw_context);
356346
err_xfrm:
357347
mlx5_accel_esp_destroy_xfrm(sa_entry->xfrm);
358-
err_sadb_rx:
359-
if (x->xso.flags & XFRM_OFFLOAD_INBOUND) {
360-
mlx5e_ipsec_sadb_rx_del(sa_entry);
361-
mlx5e_ipsec_sadb_rx_free(sa_entry);
362-
}
363-
err_entry:
348+
err_sa_entry:
364349
kfree(sa_entry);
350+
365351
out:
366352
return err;
367353
}
@@ -390,9 +376,6 @@ static void mlx5e_xfrm_free_state(struct xfrm_state *x)
390376
mlx5_accel_esp_destroy_xfrm(sa_entry->xfrm);
391377
}
392378

393-
if (x->xso.flags & XFRM_OFFLOAD_INBOUND)
394-
mlx5e_ipsec_sadb_rx_free(sa_entry);
395-
396379
kfree(sa_entry);
397380
}
398381

‎drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h

Lines changed: 0 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -109,11 +109,6 @@ int mlx5e_ipsec_init(struct mlx5e_priv *priv);
109109
void mlx5e_ipsec_cleanup(struct mlx5e_priv *priv);
110110
void mlx5e_ipsec_build_netdev(struct mlx5e_priv *priv);
111111

112-
int mlx5e_ipsec_get_count(struct mlx5e_priv *priv);
113-
int mlx5e_ipsec_get_strings(struct mlx5e_priv *priv, uint8_t *data);
114-
void mlx5e_ipsec_update_stats(struct mlx5e_priv *priv);
115-
int mlx5e_ipsec_get_stats(struct mlx5e_priv *priv, u64 *data);
116-
117112
struct xfrm_state *mlx5e_ipsec_sadb_rx_lookup(struct mlx5e_ipsec *dev,
118113
unsigned int handle);
119114

@@ -136,26 +131,6 @@ static inline void mlx5e_ipsec_build_netdev(struct mlx5e_priv *priv)
136131
{
137132
}
138133

139-
static inline int mlx5e_ipsec_get_count(struct mlx5e_priv *priv)
140-
{
141-
return 0;
142-
}
143-
144-
static inline int mlx5e_ipsec_get_strings(struct mlx5e_priv *priv,
145-
uint8_t *data)
146-
{
147-
return 0;
148-
}
149-
150-
static inline void mlx5e_ipsec_update_stats(struct mlx5e_priv *priv)
151-
{
152-
}
153-
154-
static inline int mlx5e_ipsec_get_stats(struct mlx5e_priv *priv, u64 *data)
155-
{
156-
return 0;
157-
}
158-
159134
#endif
160135

161136
#endif /* __MLX5E_IPSEC_H__ */

‎drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c

Lines changed: 51 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,7 @@
3838
#include "accel/ipsec.h"
3939
#include "fpga/sdk.h"
4040
#include "en_accel/ipsec.h"
41+
#include "fpga/ipsec.h"
4142

4243
static const struct counter_desc mlx5e_ipsec_hw_stats_desc[] = {
4344
{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_in_packets) },
@@ -73,61 +74,74 @@ static const struct counter_desc mlx5e_ipsec_sw_stats_desc[] = {
7374
#define NUM_IPSEC_HW_COUNTERS ARRAY_SIZE(mlx5e_ipsec_hw_stats_desc)
7475
#define NUM_IPSEC_SW_COUNTERS ARRAY_SIZE(mlx5e_ipsec_sw_stats_desc)
7576

76-
#define NUM_IPSEC_COUNTERS (NUM_IPSEC_HW_COUNTERS + NUM_IPSEC_SW_COUNTERS)
77-
78-
int mlx5e_ipsec_get_count(struct mlx5e_priv *priv)
77+
static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(ipsec_sw)
7978
{
80-
if (!priv->ipsec)
81-
return 0;
82-
83-
return NUM_IPSEC_COUNTERS;
79+
return NUM_IPSEC_SW_COUNTERS;
8480
}
8581

86-
int mlx5e_ipsec_get_strings(struct mlx5e_priv *priv, uint8_t *data)
87-
{
88-
unsigned int i, idx = 0;
82+
static inline MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(ipsec_sw) {}
8983

90-
if (!priv->ipsec)
91-
return 0;
84+
static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(ipsec_sw)
85+
{
86+
unsigned int i;
9287

93-
for (i = 0; i < NUM_IPSEC_HW_COUNTERS; i++)
94-
strcpy(data + (idx++) * ETH_GSTRING_LEN,
95-
mlx5e_ipsec_hw_stats_desc[i].format);
88+
if (priv->ipsec)
89+
for (i = 0; i < NUM_IPSEC_SW_COUNTERS; i++)
90+
strcpy(data + (idx++) * ETH_GSTRING_LEN,
91+
mlx5e_ipsec_sw_stats_desc[i].format);
92+
return idx;
93+
}
9694

97-
for (i = 0; i < NUM_IPSEC_SW_COUNTERS; i++)
98-
strcpy(data + (idx++) * ETH_GSTRING_LEN,
99-
mlx5e_ipsec_sw_stats_desc[i].format);
95+
static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(ipsec_sw)
96+
{
97+
int i;
10098

101-
return NUM_IPSEC_COUNTERS;
99+
if (priv->ipsec)
100+
for (i = 0; i < NUM_IPSEC_SW_COUNTERS; i++)
101+
data[idx++] = MLX5E_READ_CTR_ATOMIC64(&priv->ipsec->sw_stats,
102+
mlx5e_ipsec_sw_stats_desc, i);
103+
return idx;
102104
}
103105

104-
void mlx5e_ipsec_update_stats(struct mlx5e_priv *priv)
106+
static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(ipsec_hw)
105107
{
106-
int ret;
108+
return (mlx5_fpga_ipsec_device_caps(priv->mdev)) ? NUM_IPSEC_HW_COUNTERS : 0;
109+
}
107110

108-
if (!priv->ipsec)
109-
return;
111+
static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(ipsec_hw)
112+
{
113+
int ret = 0;
110114

111-
ret = mlx5_accel_ipsec_counters_read(priv->mdev, (u64 *)&priv->ipsec->stats,
112-
NUM_IPSEC_HW_COUNTERS);
115+
if (priv->ipsec)
116+
ret = mlx5_accel_ipsec_counters_read(priv->mdev, (u64 *)&priv->ipsec->stats,
117+
NUM_IPSEC_HW_COUNTERS);
113118
if (ret)
114119
memset(&priv->ipsec->stats, 0, sizeof(priv->ipsec->stats));
115120
}
116121

117-
int mlx5e_ipsec_get_stats(struct mlx5e_priv *priv, u64 *data)
122+
static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(ipsec_hw)
118123
{
119-
int i, idx = 0;
120-
121-
if (!priv->ipsec)
122-
return 0;
124+
unsigned int i;
123125

124-
for (i = 0; i < NUM_IPSEC_HW_COUNTERS; i++)
125-
data[idx++] = MLX5E_READ_CTR64_CPU(&priv->ipsec->stats,
126-
mlx5e_ipsec_hw_stats_desc, i);
126+
if (priv->ipsec && mlx5_fpga_ipsec_device_caps(priv->mdev))
127+
for (i = 0; i < NUM_IPSEC_HW_COUNTERS; i++)
128+
strcpy(data + (idx++) * ETH_GSTRING_LEN,
129+
mlx5e_ipsec_hw_stats_desc[i].format);
127130

128-
for (i = 0; i < NUM_IPSEC_SW_COUNTERS; i++)
129-
data[idx++] = MLX5E_READ_CTR_ATOMIC64(&priv->ipsec->sw_stats,
130-
mlx5e_ipsec_sw_stats_desc, i);
131+
return idx;
132+
}
131133

132-
return NUM_IPSEC_COUNTERS;
134+
static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(ipsec_hw)
135+
{
136+
int i;
137+
138+
if (priv->ipsec && mlx5_fpga_ipsec_device_caps(priv->mdev))
139+
for (i = 0; i < NUM_IPSEC_HW_COUNTERS; i++)
140+
data[idx++] = MLX5E_READ_CTR64_CPU(&priv->ipsec->stats,
141+
mlx5e_ipsec_hw_stats_desc,
142+
i);
143+
return idx;
133144
}
145+
146+
MLX5E_DEFINE_STATS_GRP(ipsec_sw, 0);
147+
MLX5E_DEFINE_STATS_GRP(ipsec_hw, 0);

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