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Merge tag 'drm-fixes-for-v4.17-rc2' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie: "Exynos, i915, vc4, amdgpu fixes. i915: - an oops fix - two race fixes - some gvt fixes amdgpu: - dark screen fix - clk/voltage fix - vega12 smu fix vc4: - memory leak fix exynos just drops some code" * tag 'drm-fixes-for-v4.17-rc2' of git://people.freedesktop.org/~airlied/linux: (23 commits) drm/amd/powerplay: header file interface to SMU update drm/amd/pp: Fix bug voltage can't be OD separately on VI drm/amd/display: Don't program bypass on linear regamma LUT drm/i915: Fix LSPCON TMDS output buffer enabling from low-power state drm/i915/audio: Fix audio detection issue on GLK drm/i915: Call i915_perf_fini() on init_hw error unwind drm/i915/bios: filter out invalid DDC pins from VBT child devices drm/i915/pmu: Inspect runtime PM state more carefully while estimating RC6 drm/i915: Do no use kfree() to free a kmem_cache_alloc() return value drm/exynos: exynos_drm_fb -> drm_framebuffer drm/exynos: Move dma_addr out of exynos_drm_fb drm/exynos: Move GEM BOs to drm_framebuffer drm: Fix HDCP downstream dev count read drm/vc4: Fix memory leak during BO teardown drm/i915/execlists: Clear user-active flag on preemption completion drm/i915/gvt: Add drm_format_mod update drm/i915/gvt: Disable primary/sprite/cursor plane at virtual display initialization drm/i915/gvt: Delete redundant error message in fb_decode.c drm/i915/gvt: Cancel dma map when resetting ggtt entries drm/i915/gvt: Missed to cancel dma map for ggtt entries ...
2 parents 5ec83b2 + 221bda4 commit 867ab4b

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22 files changed

+194
-136
lines changed

22 files changed

+194
-136
lines changed

‎drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -138,13 +138,6 @@ int amdgpu_dm_set_regamma_lut(struct dm_crtc_state *crtc)
138138
lut = (struct drm_color_lut *)blob->data;
139139
lut_size = blob->length / sizeof(struct drm_color_lut);
140140

141-
if (__is_lut_linear(lut, lut_size)) {
142-
/* Set to bypass if lut is set to linear */
143-
stream->out_transfer_func->type = TF_TYPE_BYPASS;
144-
stream->out_transfer_func->tf = TRANSFER_FUNCTION_LINEAR;
145-
return 0;
146-
}
147-
148141
gamma = dc_create_gamma();
149142
if (!gamma)
150143
return -ENOMEM;

‎drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

Lines changed: 10 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -4743,23 +4743,27 @@ static void smu7_check_dpm_table_updated(struct pp_hwmgr *hwmgr)
47434743

47444744
for (i=0; i < dep_table->count; i++) {
47454745
if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) {
4746-
data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_VDDC;
4747-
break;
4746+
data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_VDDC | DPMTABLE_OD_UPDATE_MCLK;
4747+
return;
47484748
}
47494749
}
4750-
if (i == dep_table->count)
4750+
if (i == dep_table->count && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_VDDC) {
47514751
data->need_update_smu7_dpm_table &= ~DPMTABLE_OD_UPDATE_VDDC;
4752+
data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_MCLK;
4753+
}
47524754

47534755
dep_table = table_info->vdd_dep_on_sclk;
47544756
odn_dep_table = (struct phm_ppt_v1_clock_voltage_dependency_table *)&(odn_table->vdd_dependency_on_sclk);
47554757
for (i=0; i < dep_table->count; i++) {
47564758
if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) {
4757-
data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_VDDC;
4758-
break;
4759+
data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_VDDC | DPMTABLE_OD_UPDATE_SCLK;
4760+
return;
47594761
}
47604762
}
4761-
if (i == dep_table->count)
4763+
if (i == dep_table->count && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_VDDC) {
47624764
data->need_update_smu7_dpm_table &= ~DPMTABLE_OD_UPDATE_VDDC;
4765+
data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK;
4766+
}
47634767
}
47644768

47654769
static int smu7_odn_edit_dpm_table(struct pp_hwmgr *hwmgr,

‎drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -412,8 +412,10 @@ typedef struct {
412412
QuadraticInt_t ReservedEquation2;
413413
QuadraticInt_t ReservedEquation3;
414414

415+
uint16_t MinVoltageUlvGfx;
416+
uint16_t MinVoltageUlvSoc;
415417

416-
uint32_t Reserved[15];
418+
uint32_t Reserved[14];
417419

418420

419421

‎drivers/gpu/drm/drm_dp_dual_mode_helper.c

Lines changed: 32 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -350,19 +350,44 @@ int drm_dp_dual_mode_set_tmds_output(enum drm_dp_dual_mode_type type,
350350
{
351351
uint8_t tmds_oen = enable ? 0 : DP_DUAL_MODE_TMDS_DISABLE;
352352
ssize_t ret;
353+
int retry;
353354

354355
if (type < DRM_DP_DUAL_MODE_TYPE2_DVI)
355356
return 0;
356357

357-
ret = drm_dp_dual_mode_write(adapter, DP_DUAL_MODE_TMDS_OEN,
358-
&tmds_oen, sizeof(tmds_oen));
359-
if (ret) {
360-
DRM_DEBUG_KMS("Failed to %s TMDS output buffers\n",
361-
enable ? "enable" : "disable");
362-
return ret;
358+
/*
359+
* LSPCON adapters in low-power state may ignore the first write, so
360+
* read back and verify the written value a few times.
361+
*/
362+
for (retry = 0; retry < 3; retry++) {
363+
uint8_t tmp;
364+
365+
ret = drm_dp_dual_mode_write(adapter, DP_DUAL_MODE_TMDS_OEN,
366+
&tmds_oen, sizeof(tmds_oen));
367+
if (ret) {
368+
DRM_DEBUG_KMS("Failed to %s TMDS output buffers (%d attempts)\n",
369+
enable ? "enable" : "disable",
370+
retry + 1);
371+
return ret;
372+
}
373+
374+
ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_TMDS_OEN,
375+
&tmp, sizeof(tmp));
376+
if (ret) {
377+
DRM_DEBUG_KMS("I2C read failed during TMDS output buffer %s (%d attempts)\n",
378+
enable ? "enabling" : "disabling",
379+
retry + 1);
380+
return ret;
381+
}
382+
383+
if (tmp == tmds_oen)
384+
return 0;
363385
}
364386

365-
return 0;
387+
DRM_DEBUG_KMS("I2C write value mismatch during TMDS output buffer %s\n",
388+
enable ? "enabling" : "disabling");
389+
390+
return -EIO;
366391
}
367392
EXPORT_SYMBOL(drm_dp_dual_mode_set_tmds_output);
368393

‎drivers/gpu/drm/exynos/exynos_drm_fb.c

Lines changed: 14 additions & 59 deletions
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@
1818
#include <drm/drm_fb_helper.h>
1919
#include <drm/drm_atomic.h>
2020
#include <drm/drm_atomic_helper.h>
21+
#include <drm/drm_gem_framebuffer_helper.h>
2122
#include <uapi/drm/exynos_drm.h>
2223

2324
#include "exynos_drm_drv.h"
@@ -26,20 +27,6 @@
2627
#include "exynos_drm_iommu.h"
2728
#include "exynos_drm_crtc.h"
2829

29-
#define to_exynos_fb(x) container_of(x, struct exynos_drm_fb, fb)
30-
31-
/*
32-
* exynos specific framebuffer structure.
33-
*
34-
* @fb: drm framebuffer obejct.
35-
* @exynos_gem: array of exynos specific gem object containing a gem object.
36-
*/
37-
struct exynos_drm_fb {
38-
struct drm_framebuffer fb;
39-
struct exynos_drm_gem *exynos_gem[MAX_FB_BUFFER];
40-
dma_addr_t dma_addr[MAX_FB_BUFFER];
41-
};
42-
4330
static int check_fb_gem_memory_type(struct drm_device *drm_dev,
4431
struct exynos_drm_gem *exynos_gem)
4532
{
@@ -66,40 +53,9 @@ static int check_fb_gem_memory_type(struct drm_device *drm_dev,
6653
return 0;
6754
}
6855

69-
static void exynos_drm_fb_destroy(struct drm_framebuffer *fb)
70-
{
71-
struct exynos_drm_fb *exynos_fb = to_exynos_fb(fb);
72-
unsigned int i;
73-
74-
drm_framebuffer_cleanup(fb);
75-
76-
for (i = 0; i < ARRAY_SIZE(exynos_fb->exynos_gem); i++) {
77-
struct drm_gem_object *obj;
78-
79-
if (exynos_fb->exynos_gem[i] == NULL)
80-
continue;
81-
82-
obj = &exynos_fb->exynos_gem[i]->base;
83-
drm_gem_object_unreference_unlocked(obj);
84-
}
85-
86-
kfree(exynos_fb);
87-
exynos_fb = NULL;
88-
}
89-
90-
static int exynos_drm_fb_create_handle(struct drm_framebuffer *fb,
91-
struct drm_file *file_priv,
92-
unsigned int *handle)
93-
{
94-
struct exynos_drm_fb *exynos_fb = to_exynos_fb(fb);
95-
96-
return drm_gem_handle_create(file_priv,
97-
&exynos_fb->exynos_gem[0]->base, handle);
98-
}
99-
10056
static const struct drm_framebuffer_funcs exynos_drm_fb_funcs = {
101-
.destroy = exynos_drm_fb_destroy,
102-
.create_handle = exynos_drm_fb_create_handle,
57+
.destroy = drm_gem_fb_destroy,
58+
.create_handle = drm_gem_fb_create_handle,
10359
};
10460

10561
struct drm_framebuffer *
@@ -108,36 +64,34 @@ exynos_drm_framebuffer_init(struct drm_device *dev,
10864
struct exynos_drm_gem **exynos_gem,
10965
int count)
11066
{
111-
struct exynos_drm_fb *exynos_fb;
67+
struct drm_framebuffer *fb;
11268
int i;
11369
int ret;
11470

115-
exynos_fb = kzalloc(sizeof(*exynos_fb), GFP_KERNEL);
116-
if (!exynos_fb)
71+
fb = kzalloc(sizeof(*fb), GFP_KERNEL);
72+
if (!fb)
11773
return ERR_PTR(-ENOMEM);
11874

11975
for (i = 0; i < count; i++) {
12076
ret = check_fb_gem_memory_type(dev, exynos_gem[i]);
12177
if (ret < 0)
12278
goto err;
12379

124-
exynos_fb->exynos_gem[i] = exynos_gem[i];
125-
exynos_fb->dma_addr[i] = exynos_gem[i]->dma_addr
126-
+ mode_cmd->offsets[i];
80+
fb->obj[i] = &exynos_gem[i]->base;
12781
}
12882

129-
drm_helper_mode_fill_fb_struct(dev, &exynos_fb->fb, mode_cmd);
83+
drm_helper_mode_fill_fb_struct(dev, fb, mode_cmd);
13084

131-
ret = drm_framebuffer_init(dev, &exynos_fb->fb, &exynos_drm_fb_funcs);
85+
ret = drm_framebuffer_init(dev, fb, &exynos_drm_fb_funcs);
13286
if (ret < 0) {
13387
DRM_ERROR("failed to initialize framebuffer\n");
13488
goto err;
13589
}
13690

137-
return &exynos_fb->fb;
91+
return fb;
13892

13993
err:
140-
kfree(exynos_fb);
94+
kfree(fb);
14195
return ERR_PTR(ret);
14296
}
14397

@@ -191,12 +145,13 @@ exynos_user_fb_create(struct drm_device *dev, struct drm_file *file_priv,
191145

192146
dma_addr_t exynos_drm_fb_dma_addr(struct drm_framebuffer *fb, int index)
193147
{
194-
struct exynos_drm_fb *exynos_fb = to_exynos_fb(fb);
148+
struct exynos_drm_gem *exynos_gem;
195149

196150
if (WARN_ON_ONCE(index >= MAX_FB_BUFFER))
197151
return 0;
198152

199-
return exynos_fb->dma_addr[index];
153+
exynos_gem = to_exynos_gem(fb->obj[index]);
154+
return exynos_gem->dma_addr + fb->offsets[index];
200155
}
201156

202157
static struct drm_mode_config_helper_funcs exynos_drm_mode_config_helpers = {

‎drivers/gpu/drm/i915/gvt/cmd_parser.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1080,6 +1080,7 @@ static int cmd_handler_mi_user_interrupt(struct parser_exec_state *s)
10801080
{
10811081
set_bit(cmd_interrupt_events[s->ring_id].mi_user_interrupt,
10821082
s->workload->pending_events);
1083+
patch_value(s, cmd_ptr(s, 0), MI_NOOP);
10831084
return 0;
10841085
}
10851086

‎drivers/gpu/drm/i915/gvt/display.c

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -169,6 +169,8 @@ static u8 dpcd_fix_data[DPCD_HEADER_SIZE] = {
169169
static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
170170
{
171171
struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
172+
int pipe;
173+
172174
vgpu_vreg_t(vgpu, SDEISR) &= ~(SDE_PORTB_HOTPLUG_CPT |
173175
SDE_PORTC_HOTPLUG_CPT |
174176
SDE_PORTD_HOTPLUG_CPT);
@@ -267,6 +269,14 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
267269
if (IS_BROADWELL(dev_priv))
268270
vgpu_vreg_t(vgpu, PCH_ADPA) &= ~ADPA_CRT_HOTPLUG_MONITOR_MASK;
269271

272+
/* Disable Primary/Sprite/Cursor plane */
273+
for_each_pipe(dev_priv, pipe) {
274+
vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISPLAY_PLANE_ENABLE;
275+
vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;
276+
vgpu_vreg_t(vgpu, CURCNTR(pipe)) &= ~CURSOR_MODE;
277+
vgpu_vreg_t(vgpu, CURCNTR(pipe)) |= CURSOR_MODE_DISABLE;
278+
}
279+
270280
vgpu_vreg_t(vgpu, PIPECONF(PIPE_A)) |= PIPECONF_ENABLE;
271281
}
272282

‎drivers/gpu/drm/i915/gvt/dmabuf.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -323,6 +323,7 @@ static void update_fb_info(struct vfio_device_gfx_plane_info *gvt_dmabuf,
323323
struct intel_vgpu_fb_info *fb_info)
324324
{
325325
gvt_dmabuf->drm_format = fb_info->drm_format;
326+
gvt_dmabuf->drm_format_mod = fb_info->drm_format_mod;
326327
gvt_dmabuf->width = fb_info->width;
327328
gvt_dmabuf->height = fb_info->height;
328329
gvt_dmabuf->stride = fb_info->stride;

‎drivers/gpu/drm/i915/gvt/fb_decoder.c

Lines changed: 9 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -245,16 +245,13 @@ int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu,
245245
plane->hw_format = fmt;
246246

247247
plane->base = vgpu_vreg_t(vgpu, DSPSURF(pipe)) & I915_GTT_PAGE_MASK;
248-
if (!intel_gvt_ggtt_validate_range(vgpu, plane->base, 0)) {
249-
gvt_vgpu_err("invalid gma address: %lx\n",
250-
(unsigned long)plane->base);
248+
if (!intel_gvt_ggtt_validate_range(vgpu, plane->base, 0))
251249
return -EINVAL;
252-
}
253250

254251
plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);
255252
if (plane->base_gpa == INTEL_GVT_INVALID_ADDR) {
256-
gvt_vgpu_err("invalid gma address: %lx\n",
257-
(unsigned long)plane->base);
253+
gvt_vgpu_err("Translate primary plane gma 0x%x to gpa fail\n",
254+
plane->base);
258255
return -EINVAL;
259256
}
260257

@@ -371,16 +368,13 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu,
371368
alpha_plane, alpha_force);
372369

373370
plane->base = vgpu_vreg_t(vgpu, CURBASE(pipe)) & I915_GTT_PAGE_MASK;
374-
if (!intel_gvt_ggtt_validate_range(vgpu, plane->base, 0)) {
375-
gvt_vgpu_err("invalid gma address: %lx\n",
376-
(unsigned long)plane->base);
371+
if (!intel_gvt_ggtt_validate_range(vgpu, plane->base, 0))
377372
return -EINVAL;
378-
}
379373

380374
plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);
381375
if (plane->base_gpa == INTEL_GVT_INVALID_ADDR) {
382-
gvt_vgpu_err("invalid gma address: %lx\n",
383-
(unsigned long)plane->base);
376+
gvt_vgpu_err("Translate cursor plane gma 0x%x to gpa fail\n",
377+
plane->base);
384378
return -EINVAL;
385379
}
386380

@@ -476,16 +470,13 @@ int intel_vgpu_decode_sprite_plane(struct intel_vgpu *vgpu,
476470
plane->drm_format = drm_format;
477471

478472
plane->base = vgpu_vreg_t(vgpu, SPRSURF(pipe)) & I915_GTT_PAGE_MASK;
479-
if (!intel_gvt_ggtt_validate_range(vgpu, plane->base, 0)) {
480-
gvt_vgpu_err("invalid gma address: %lx\n",
481-
(unsigned long)plane->base);
473+
if (!intel_gvt_ggtt_validate_range(vgpu, plane->base, 0))
482474
return -EINVAL;
483-
}
484475

485476
plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);
486477
if (plane->base_gpa == INTEL_GVT_INVALID_ADDR) {
487-
gvt_vgpu_err("invalid gma address: %lx\n",
488-
(unsigned long)plane->base);
478+
gvt_vgpu_err("Translate sprite plane gma 0x%x to gpa fail\n",
479+
plane->base);
489480
return -EINVAL;
490481
}
491482

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