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serial: max310x: improve crystal stable clock detection
Some people are seeing a warning similar to this when using a crystal: max310x 11-006c: clock is not stable yet The datasheet doesn't mention the maximum time to wait for the clock to be stable when using a crystal, and it seems that the 10ms delay in the driver is not always sufficient. Jan Kundrát reported that it took three tries (each separated by 10ms) to get a stable clock. Modify behavior to check stable clock ready bit multiple times (20), and waiting 10ms between each try. Note: the first draft of the driver originally used a 50ms delay, without checking the clock stable bit. Then a loop with 1000 retries was implemented, each time reading the clock stable bit. Fixes: 4cf9a88 ("serial: max310x: Check the clock readiness") Cc: [email protected] Suggested-by: Jan Kundrát <[email protected]> Link: https://www.spinics.net/lists/linux-serial/msg35773.html Link: https://lore.kernel.org/all/[email protected]/raw Link: boundarydevices/linux@e5dfe3e Signed-off-by: Hugo Villeneuve <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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drivers/tty/serial/max310x.c

Lines changed: 16 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -237,6 +237,10 @@
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#define MAX310x_REV_MASK (0xf8)
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#define MAX310X_WRITE_BIT 0x80
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240+
/* Crystal-related definitions */
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#define MAX310X_XTAL_WAIT_RETRIES 20 /* Number of retries */
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#define MAX310X_XTAL_WAIT_DELAY_MS 10 /* Delay between retries */
243+
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/* MAX3107 specific */
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#define MAX3107_REV_ID (0xa0)
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@@ -641,12 +645,19 @@ static u32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
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/* Wait for crystal */
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if (xtal) {
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unsigned int val = 0;
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msleep(10);
646-
regmap_read(s->regmap, MAX310X_STS_IRQSTS_REG, &val);
647-
if (!(val & MAX310X_STS_CLKREADY_BIT)) {
648+
bool stable = false;
649+
unsigned int try = 0, val = 0;
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do {
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msleep(MAX310X_XTAL_WAIT_DELAY_MS);
653+
regmap_read(s->regmap, MAX310X_STS_IRQSTS_REG, &val);
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if (val & MAX310X_STS_CLKREADY_BIT)
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stable = true;
657+
} while (!stable && (++try < MAX310X_XTAL_WAIT_RETRIES));
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if (!stable)
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dev_warn(dev, "clock is not stable yet\n");
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}
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}
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return bestfreq;

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