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166 | 166 | reg = <0x0 0x10010000 0x0 0x1000>;
|
167 | 167 | interrupt-parent = <&plic0>;
|
168 | 168 | interrupts = <39>;
|
169 |
| - clocks = <&prci PRCI_CLK_PCLK>; |
| 169 | + clocks = <&prci FU740_PRCI_CLK_PCLK>; |
170 | 170 | status = "disabled";
|
171 | 171 | };
|
172 | 172 | uart1: serial@10011000 {
|
173 | 173 | compatible = "sifive,fu740-c000-uart", "sifive,uart0";
|
174 | 174 | reg = <0x0 0x10011000 0x0 0x1000>;
|
175 | 175 | interrupt-parent = <&plic0>;
|
176 | 176 | interrupts = <40>;
|
177 |
| - clocks = <&prci PRCI_CLK_PCLK>; |
| 177 | + clocks = <&prci FU740_PRCI_CLK_PCLK>; |
178 | 178 | status = "disabled";
|
179 | 179 | };
|
180 | 180 | i2c0: i2c@10030000 {
|
181 | 181 | compatible = "sifive,fu740-c000-i2c", "sifive,i2c0";
|
182 | 182 | reg = <0x0 0x10030000 0x0 0x1000>;
|
183 | 183 | interrupt-parent = <&plic0>;
|
184 | 184 | interrupts = <52>;
|
185 |
| - clocks = <&prci PRCI_CLK_PCLK>; |
| 185 | + clocks = <&prci FU740_PRCI_CLK_PCLK>; |
186 | 186 | reg-shift = <2>;
|
187 | 187 | reg-io-width = <1>;
|
188 | 188 | #address-cells = <1>;
|
|
194 | 194 | reg = <0x0 0x10031000 0x0 0x1000>;
|
195 | 195 | interrupt-parent = <&plic0>;
|
196 | 196 | interrupts = <53>;
|
197 |
| - clocks = <&prci PRCI_CLK_PCLK>; |
| 197 | + clocks = <&prci FU740_PRCI_CLK_PCLK>; |
198 | 198 | reg-shift = <2>;
|
199 | 199 | reg-io-width = <1>;
|
200 | 200 | #address-cells = <1>;
|
|
207 | 207 | <0x0 0x20000000 0x0 0x10000000>;
|
208 | 208 | interrupt-parent = <&plic0>;
|
209 | 209 | interrupts = <41>;
|
210 |
| - clocks = <&prci PRCI_CLK_PCLK>; |
| 210 | + clocks = <&prci FU740_PRCI_CLK_PCLK>; |
211 | 211 | #address-cells = <1>;
|
212 | 212 | #size-cells = <0>;
|
213 | 213 | status = "disabled";
|
|
218 | 218 | <0x0 0x30000000 0x0 0x10000000>;
|
219 | 219 | interrupt-parent = <&plic0>;
|
220 | 220 | interrupts = <42>;
|
221 |
| - clocks = <&prci PRCI_CLK_PCLK>; |
| 221 | + clocks = <&prci FU740_PRCI_CLK_PCLK>; |
222 | 222 | #address-cells = <1>;
|
223 | 223 | #size-cells = <0>;
|
224 | 224 | status = "disabled";
|
|
228 | 228 | reg = <0x0 0x10050000 0x0 0x1000>;
|
229 | 229 | interrupt-parent = <&plic0>;
|
230 | 230 | interrupts = <43>;
|
231 |
| - clocks = <&prci PRCI_CLK_PCLK>; |
| 231 | + clocks = <&prci FU740_PRCI_CLK_PCLK>; |
232 | 232 | #address-cells = <1>;
|
233 | 233 | #size-cells = <0>;
|
234 | 234 | status = "disabled";
|
|
241 | 241 | <0x0 0x100a0000 0x0 0x1000>;
|
242 | 242 | local-mac-address = [00 00 00 00 00 00];
|
243 | 243 | clock-names = "pclk", "hclk";
|
244 |
| - clocks = <&prci PRCI_CLK_GEMGXLPLL>, |
245 |
| - <&prci PRCI_CLK_GEMGXLPLL>; |
| 244 | + clocks = <&prci FU740_PRCI_CLK_GEMGXLPLL>, |
| 245 | + <&prci FU740_PRCI_CLK_GEMGXLPLL>; |
246 | 246 | #address-cells = <1>;
|
247 | 247 | #size-cells = <0>;
|
248 | 248 | status = "disabled";
|
|
252 | 252 | reg = <0x0 0x10020000 0x0 0x1000>;
|
253 | 253 | interrupt-parent = <&plic0>;
|
254 | 254 | interrupts = <44>, <45>, <46>, <47>;
|
255 |
| - clocks = <&prci PRCI_CLK_PCLK>; |
| 255 | + clocks = <&prci FU740_PRCI_CLK_PCLK>; |
256 | 256 | #pwm-cells = <3>;
|
257 | 257 | status = "disabled";
|
258 | 258 | };
|
|
261 | 261 | reg = <0x0 0x10021000 0x0 0x1000>;
|
262 | 262 | interrupt-parent = <&plic0>;
|
263 | 263 | interrupts = <48>, <49>, <50>, <51>;
|
264 |
| - clocks = <&prci PRCI_CLK_PCLK>; |
| 264 | + clocks = <&prci FU740_PRCI_CLK_PCLK>; |
265 | 265 | #pwm-cells = <3>;
|
266 | 266 | status = "disabled";
|
267 | 267 | };
|
|
287 | 287 | #gpio-cells = <2>;
|
288 | 288 | interrupt-controller;
|
289 | 289 | #interrupt-cells = <2>;
|
290 |
| - clocks = <&prci PRCI_CLK_PCLK>; |
| 290 | + clocks = <&prci FU740_PRCI_CLK_PCLK>; |
291 | 291 | status = "disabled";
|
292 | 292 | };
|
293 | 293 | pcie@e00000000 {
|
|
316 | 316 | <0x0 0x0 0x0 0x3 &plic0 59>,
|
317 | 317 | <0x0 0x0 0x0 0x4 &plic0 60>;
|
318 | 318 | clock-names = "pcie_aux";
|
319 |
| - clocks = <&prci PRCI_CLK_PCIE_AUX>; |
| 319 | + clocks = <&prci FU740_PRCI_CLK_PCIE_AUX>; |
320 | 320 | pwren-gpios = <&gpio 5 0>;
|
321 | 321 | reset-gpios = <&gpio 8 0>;
|
322 | 322 | resets = <&prci 4>;
|
|
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