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Paolo Abeni
committed
Merge branch 'read-phy-address-of-switch-from-device-tree-on-mt7530-dsa-subdriver'
Arınç ÜNAL says: ==================== Read PHY address of switch from device tree on MT7530 DSA subdriver This patch series makes the driver read the PHY address the switch listens on from the device tree which, in result, brings support for MT7530 switches listening on a different PHY address than 31. And the patch series simplifies the core operations. Signed-off-by: Arınç ÜNAL <[email protected]> ==================== Link: https://lore.kernel.org/r/20240418-b4-for-netnext-mt7530-phy-addr-from-dt-and-simplify-core-ops-v3-0-3b5fb249b004@arinc9.com Signed-off-by: Paolo Abeni <[email protected]>
2 parents 077633a + 7c5e37d commit 9b9fd02

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+75
-84
lines changed

3 files changed

+75
-84
lines changed

‎drivers/net/dsa/mt7530-mdio.c

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,8 @@
1818
static int
1919
mt7530_regmap_write(void *context, unsigned int reg, unsigned int val)
2020
{
21-
struct mii_bus *bus = context;
21+
struct mt7530_priv *priv = context;
22+
struct mii_bus *bus = priv->bus;
2223
u16 page, r, lo, hi;
2324
int ret;
2425

@@ -27,36 +28,35 @@ mt7530_regmap_write(void *context, unsigned int reg, unsigned int val)
2728
lo = val & 0xffff;
2829
hi = val >> 16;
2930

30-
/* MT7530 uses 31 as the pseudo port */
31-
ret = bus->write(bus, 0x1f, 0x1f, page);
31+
ret = bus->write(bus, priv->mdiodev->addr, 0x1f, page);
3232
if (ret < 0)
3333
return ret;
3434

35-
ret = bus->write(bus, 0x1f, r, lo);
35+
ret = bus->write(bus, priv->mdiodev->addr, r, lo);
3636
if (ret < 0)
3737
return ret;
3838

39-
ret = bus->write(bus, 0x1f, 0x10, hi);
39+
ret = bus->write(bus, priv->mdiodev->addr, 0x10, hi);
4040
return ret;
4141
}
4242

4343
static int
4444
mt7530_regmap_read(void *context, unsigned int reg, unsigned int *val)
4545
{
46-
struct mii_bus *bus = context;
46+
struct mt7530_priv *priv = context;
47+
struct mii_bus *bus = priv->bus;
4748
u16 page, r, lo, hi;
4849
int ret;
4950

5051
page = (reg >> 6) & 0x3ff;
5152
r = (reg >> 2) & 0xf;
5253

53-
/* MT7530 uses 31 as the pseudo port */
54-
ret = bus->write(bus, 0x1f, 0x1f, page);
54+
ret = bus->write(bus, priv->mdiodev->addr, 0x1f, page);
5555
if (ret < 0)
5656
return ret;
5757

58-
lo = bus->read(bus, 0x1f, r);
59-
hi = bus->read(bus, 0x1f, 0x10);
58+
lo = bus->read(bus, priv->mdiodev->addr, r);
59+
hi = bus->read(bus, priv->mdiodev->addr, 0x10);
6060

6161
*val = (hi << 16) | (lo & 0xffff);
6262

@@ -107,8 +107,7 @@ mt7531_create_sgmii(struct mt7530_priv *priv)
107107
mt7531_pcs_config[i]->unlock = mt7530_mdio_regmap_unlock;
108108
mt7531_pcs_config[i]->lock_arg = &priv->bus->mdio_lock;
109109

110-
regmap = devm_regmap_init(priv->dev,
111-
&mt7530_regmap_bus, priv->bus,
110+
regmap = devm_regmap_init(priv->dev, &mt7530_regmap_bus, priv,
112111
mt7531_pcs_config[i]);
113112
if (IS_ERR(regmap)) {
114113
ret = PTR_ERR(regmap);
@@ -153,6 +152,7 @@ mt7530_probe(struct mdio_device *mdiodev)
153152

154153
priv->bus = mdiodev->bus;
155154
priv->dev = &mdiodev->dev;
155+
priv->mdiodev = mdiodev;
156156

157157
ret = mt7530_probe_common(priv);
158158
if (ret)
@@ -203,8 +203,8 @@ mt7530_probe(struct mdio_device *mdiodev)
203203
regmap_config->reg_stride = 4;
204204
regmap_config->max_register = MT7530_CREV;
205205
regmap_config->disable_locking = true;
206-
priv->regmap = devm_regmap_init(priv->dev, &mt7530_regmap_bus,
207-
priv->bus, regmap_config);
206+
priv->regmap = devm_regmap_init(priv->dev, &mt7530_regmap_bus, priv,
207+
regmap_config);
208208
if (IS_ERR(priv->regmap))
209209
return PTR_ERR(priv->regmap);
210210

‎drivers/net/dsa/mt7530.c

Lines changed: 58 additions & 69 deletions
Original file line numberDiff line numberDiff line change
@@ -74,108 +74,94 @@ static const struct mt7530_mib_desc mt7530_mib[] = {
7474
MIB_DESC(1, 0xb8, "RxArlDrop"),
7575
};
7676

77-
/* Since phy_device has not yet been created and
78-
* phy_{read,write}_mmd_indirect is not available, we provide our own
79-
* core_{read,write}_mmd_indirect with core_{clear,write,set} wrappers
80-
* to complete this function.
81-
*/
82-
static int
83-
core_read_mmd_indirect(struct mt7530_priv *priv, int prtad, int devad)
77+
static void
78+
mt7530_mutex_lock(struct mt7530_priv *priv)
79+
{
80+
if (priv->bus)
81+
mutex_lock_nested(&priv->bus->mdio_lock, MDIO_MUTEX_NESTED);
82+
}
83+
84+
static void
85+
mt7530_mutex_unlock(struct mt7530_priv *priv)
86+
{
87+
if (priv->bus)
88+
mutex_unlock(&priv->bus->mdio_lock);
89+
}
90+
91+
static void
92+
core_write(struct mt7530_priv *priv, u32 reg, u32 val)
8493
{
8594
struct mii_bus *bus = priv->bus;
86-
int value, ret;
95+
int ret;
96+
97+
mt7530_mutex_lock(priv);
8798

8899
/* Write the desired MMD Devad */
89-
ret = bus->write(bus, 0, MII_MMD_CTRL, devad);
100+
ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
101+
MII_MMD_CTRL, MDIO_MMD_VEND2);
90102
if (ret < 0)
91103
goto err;
92104

93105
/* Write the desired MMD register address */
94-
ret = bus->write(bus, 0, MII_MMD_DATA, prtad);
106+
ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
107+
MII_MMD_DATA, reg);
95108
if (ret < 0)
96109
goto err;
97110

98111
/* Select the Function : DATA with no post increment */
99-
ret = bus->write(bus, 0, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
112+
ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
113+
MII_MMD_CTRL, MDIO_MMD_VEND2 | MII_MMD_CTRL_NOINCR);
100114
if (ret < 0)
101115
goto err;
102116

103-
/* Read the content of the MMD's selected register */
104-
value = bus->read(bus, 0, MII_MMD_DATA);
105-
106-
return value;
117+
/* Write the data into MMD's selected register */
118+
ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
119+
MII_MMD_DATA, val);
107120
err:
108-
dev_err(&bus->dev, "failed to read mmd register\n");
121+
if (ret < 0)
122+
dev_err(&bus->dev, "failed to write mmd register\n");
109123

110-
return ret;
124+
mt7530_mutex_unlock(priv);
111125
}
112126

113-
static int
114-
core_write_mmd_indirect(struct mt7530_priv *priv, int prtad,
115-
int devad, u32 data)
127+
static void
128+
core_rmw(struct mt7530_priv *priv, u32 reg, u32 mask, u32 set)
116129
{
117130
struct mii_bus *bus = priv->bus;
131+
u32 val;
118132
int ret;
119133

134+
mt7530_mutex_lock(priv);
135+
120136
/* Write the desired MMD Devad */
121-
ret = bus->write(bus, 0, MII_MMD_CTRL, devad);
137+
ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
138+
MII_MMD_CTRL, MDIO_MMD_VEND2);
122139
if (ret < 0)
123140
goto err;
124141

125142
/* Write the desired MMD register address */
126-
ret = bus->write(bus, 0, MII_MMD_DATA, prtad);
143+
ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
144+
MII_MMD_DATA, reg);
127145
if (ret < 0)
128146
goto err;
129147

130148
/* Select the Function : DATA with no post increment */
131-
ret = bus->write(bus, 0, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
149+
ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
150+
MII_MMD_CTRL, MDIO_MMD_VEND2 | MII_MMD_CTRL_NOINCR);
132151
if (ret < 0)
133152
goto err;
134153

154+
/* Read the content of the MMD's selected register */
155+
val = bus->read(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
156+
MII_MMD_DATA);
157+
val &= ~mask;
158+
val |= set;
135159
/* Write the data into MMD's selected register */
136-
ret = bus->write(bus, 0, MII_MMD_DATA, data);
160+
ret = bus->write(bus, MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
161+
MII_MMD_DATA, val);
137162
err:
138163
if (ret < 0)
139-
dev_err(&bus->dev,
140-
"failed to write mmd register\n");
141-
return ret;
142-
}
143-
144-
static void
145-
mt7530_mutex_lock(struct mt7530_priv *priv)
146-
{
147-
if (priv->bus)
148-
mutex_lock_nested(&priv->bus->mdio_lock, MDIO_MUTEX_NESTED);
149-
}
150-
151-
static void
152-
mt7530_mutex_unlock(struct mt7530_priv *priv)
153-
{
154-
if (priv->bus)
155-
mutex_unlock(&priv->bus->mdio_lock);
156-
}
157-
158-
static void
159-
core_write(struct mt7530_priv *priv, u32 reg, u32 val)
160-
{
161-
mt7530_mutex_lock(priv);
162-
163-
core_write_mmd_indirect(priv, reg, MDIO_MMD_VEND2, val);
164-
165-
mt7530_mutex_unlock(priv);
166-
}
167-
168-
static void
169-
core_rmw(struct mt7530_priv *priv, u32 reg, u32 mask, u32 set)
170-
{
171-
u32 val;
172-
173-
mt7530_mutex_lock(priv);
174-
175-
val = core_read_mmd_indirect(priv, reg, MDIO_MMD_VEND2);
176-
val &= ~mask;
177-
val |= set;
178-
core_write_mmd_indirect(priv, reg, MDIO_MMD_VEND2, val);
164+
dev_err(&bus->dev, "failed to write mmd register\n");
179165

180166
mt7530_mutex_unlock(priv);
181167
}
@@ -2679,16 +2665,19 @@ mt7531_setup(struct dsa_switch *ds)
26792665
* phy_[read,write]_mmd_indirect is called, we provide our own
26802666
* mt7531_ind_mmd_phy_[read,write] to complete this function.
26812667
*/
2682-
val = mt7531_ind_c45_phy_read(priv, MT753X_CTRL_PHY_ADDR,
2668+
val = mt7531_ind_c45_phy_read(priv,
2669+
MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
26832670
MDIO_MMD_VEND2, CORE_PLL_GROUP4);
26842671
val |= MT7531_RG_SYSPLL_DMY2 | MT7531_PHY_PLL_BYPASS_MODE;
26852672
val &= ~MT7531_PHY_PLL_OFF;
2686-
mt7531_ind_c45_phy_write(priv, MT753X_CTRL_PHY_ADDR, MDIO_MMD_VEND2,
2687-
CORE_PLL_GROUP4, val);
2673+
mt7531_ind_c45_phy_write(priv,
2674+
MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr),
2675+
MDIO_MMD_VEND2, CORE_PLL_GROUP4, val);
26882676

26892677
/* Disable EEE advertisement on the switch PHYs. */
2690-
for (i = MT753X_CTRL_PHY_ADDR;
2691-
i < MT753X_CTRL_PHY_ADDR + MT7530_NUM_PHYS; i++) {
2678+
for (i = MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr);
2679+
i < MT753X_CTRL_PHY_ADDR(priv->mdiodev->addr) + MT7530_NUM_PHYS;
2680+
i++) {
26922681
mt7531_ind_c45_phy_write(priv, i, MDIO_MMD_AN, MDIO_AN_EEE_ADV,
26932682
0);
26942683
}

‎drivers/net/dsa/mt7530.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -629,7 +629,7 @@ enum mt7531_clk_skew {
629629
#define MT7531_PHY_PLL_OFF BIT(5)
630630
#define MT7531_PHY_PLL_BYPASS_MODE BIT(4)
631631

632-
#define MT753X_CTRL_PHY_ADDR 0
632+
#define MT753X_CTRL_PHY_ADDR(addr) ((addr + 1) & 0x1f)
633633

634634
#define CORE_PLL_GROUP5 0x404
635635
#define RG_LCDDS_PCW_NCPO1(x) ((x) & 0xffff)
@@ -778,6 +778,7 @@ struct mt753x_info {
778778
* @irq_enable: IRQ enable bits, synced to SYS_INT_EN
779779
* @create_sgmii: Pointer to function creating SGMII PCS instance(s)
780780
* @active_cpu_ports: Holding the active CPU ports
781+
* @mdiodev: The pointer to the MDIO device structure
781782
*/
782783
struct mt7530_priv {
783784
struct device *dev;
@@ -804,6 +805,7 @@ struct mt7530_priv {
804805
u32 irq_enable;
805806
int (*create_sgmii)(struct mt7530_priv *priv);
806807
u8 active_cpu_ports;
808+
struct mdio_device *mdiodev;
807809
};
808810

809811
struct mt7530_hw_vlan_entry {

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