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Merge tag 'drm-xe-next-2025-01-07' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next
UAPI Changes: - OA new property: 'unblock after N reports' (Ashutosh) i915 display Changes: - UHBR rates for Thunderbolt (Kahola) Driver Changes: - IRQ related fixes and improvements (Ilia) - Revert some changes that break a mesa debug tool (John) - Fix migration issues (Nirmoy) - Enable GuC's WA_DUAL_QUEUE for newer platforms (Daniele) - Move shrink test out of xe_bo (Nirmoy) - SRIOV PF: Use correct function to check LMEM provisioning (Michal) - Fix a false-positive "Missing outer runtime PM protection" warning (Rodrigo) - Make GSCCS disabling message less alarming (Daniele) - Fix DG1 power gate sequence (Rodrigo) - Xe files fixes (Lucas) - Fix a potential TP_printk UAF (Thomas) - OA Fixes (Umesh) - Fix tlb invalidation when wedging (Lucas) - Documentation fix (Lucas) Signed-off-by: Dave Airlie <[email protected]> From: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2 parents 0739b8b + 6acea03 commit 9cc3e4e

36 files changed

+589
-281
lines changed

‎drivers/gpu/drm/i915/display/intel_cx0_phy.c

Lines changed: 35 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3070,7 +3070,10 @@ int intel_mtl_tbt_calc_port_clock(struct intel_encoder *encoder)
30703070

30713071
val = intel_de_read(display, XELPDP_PORT_CLOCK_CTL(display, encoder->port));
30723072

3073-
clock = REG_FIELD_GET(XELPDP_DDI_CLOCK_SELECT_MASK, val);
3073+
if (DISPLAY_VER(display) >= 30)
3074+
clock = REG_FIELD_GET(XE3_DDI_CLOCK_SELECT_MASK, val);
3075+
else
3076+
clock = REG_FIELD_GET(XELPDP_DDI_CLOCK_SELECT_MASK, val);
30743077

30753078
drm_WARN_ON(display->drm, !(val & XELPDP_FORWARD_CLOCK_UNGATE));
30763079
drm_WARN_ON(display->drm, !(val & XELPDP_TBT_CLOCK_REQUEST));
@@ -3085,13 +3088,18 @@ int intel_mtl_tbt_calc_port_clock(struct intel_encoder *encoder)
30853088
return 540000;
30863089
case XELPDP_DDI_CLOCK_SELECT_TBT_810:
30873090
return 810000;
3091+
case XELPDP_DDI_CLOCK_SELECT_TBT_312_5:
3092+
return 1000000;
3093+
case XELPDP_DDI_CLOCK_SELECT_TBT_625:
3094+
return 2000000;
30883095
default:
30893096
MISSING_CASE(clock);
30903097
return 162000;
30913098
}
30923099
}
30933100

3094-
static int intel_mtl_tbt_clock_select(int clock)
3101+
static int intel_mtl_tbt_clock_select(struct intel_display *display,
3102+
int clock)
30953103
{
30963104
switch (clock) {
30973105
case 162000:
@@ -3102,6 +3110,18 @@ static int intel_mtl_tbt_clock_select(int clock)
31023110
return XELPDP_DDI_CLOCK_SELECT_TBT_540;
31033111
case 810000:
31043112
return XELPDP_DDI_CLOCK_SELECT_TBT_810;
3113+
case 1000000:
3114+
if (DISPLAY_VER(display) < 30) {
3115+
drm_WARN_ON(display->drm, "UHBR10 not supported for the platform\n");
3116+
return XELPDP_DDI_CLOCK_SELECT_TBT_162;
3117+
}
3118+
return XELPDP_DDI_CLOCK_SELECT_TBT_312_5;
3119+
case 2000000:
3120+
if (DISPLAY_VER(display) < 30) {
3121+
drm_WARN_ON(display->drm, "UHBR20 not supported for the platform\n");
3122+
return XELPDP_DDI_CLOCK_SELECT_TBT_162;
3123+
}
3124+
return XELPDP_DDI_CLOCK_SELECT_TBT_625;
31053125
default:
31063126
MISSING_CASE(clock);
31073127
return XELPDP_DDI_CLOCK_SELECT_TBT_162;
@@ -3114,15 +3134,26 @@ static void intel_mtl_tbt_pll_enable(struct intel_encoder *encoder,
31143134
struct intel_display *display = to_intel_display(encoder);
31153135
enum phy phy = intel_encoder_to_phy(encoder);
31163136
u32 val = 0;
3137+
u32 mask;
31173138

31183139
/*
31193140
* 1. Program PORT_CLOCK_CTL REGISTER to configure
31203141
* clock muxes, gating and SSC
31213142
*/
3122-
val |= XELPDP_DDI_CLOCK_SELECT(intel_mtl_tbt_clock_select(crtc_state->port_clock));
3143+
3144+
if (DISPLAY_VER(display) >= 30) {
3145+
mask = XE3_DDI_CLOCK_SELECT_MASK;
3146+
val |= XE3_DDI_CLOCK_SELECT(intel_mtl_tbt_clock_select(display, crtc_state->port_clock));
3147+
} else {
3148+
mask = XELPDP_DDI_CLOCK_SELECT_MASK;
3149+
val |= XELPDP_DDI_CLOCK_SELECT(intel_mtl_tbt_clock_select(display, crtc_state->port_clock));
3150+
}
3151+
3152+
mask |= XELPDP_FORWARD_CLOCK_UNGATE;
31233153
val |= XELPDP_FORWARD_CLOCK_UNGATE;
3154+
31243155
intel_de_rmw(display, XELPDP_PORT_CLOCK_CTL(display, encoder->port),
3125-
XELPDP_DDI_CLOCK_SELECT_MASK | XELPDP_FORWARD_CLOCK_UNGATE, val);
3156+
mask, val);
31263157

31273158
/* 2. Read back PORT_CLOCK_CTL REGISTER */
31283159
val = intel_de_read(display, XELPDP_PORT_CLOCK_CTL(display, encoder->port));

‎drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -187,14 +187,18 @@
187187
#define XELPDP_TBT_CLOCK_REQUEST REG_BIT(19)
188188
#define XELPDP_TBT_CLOCK_ACK REG_BIT(18)
189189
#define XELPDP_DDI_CLOCK_SELECT_MASK REG_GENMASK(15, 12)
190+
#define XE3_DDI_CLOCK_SELECT_MASK REG_GENMASK(16, 12)
190191
#define XELPDP_DDI_CLOCK_SELECT(val) REG_FIELD_PREP(XELPDP_DDI_CLOCK_SELECT_MASK, val)
192+
#define XE3_DDI_CLOCK_SELECT(val) REG_FIELD_PREP(XE3_DDI_CLOCK_SELECT_MASK, val)
191193
#define XELPDP_DDI_CLOCK_SELECT_NONE 0x0
192194
#define XELPDP_DDI_CLOCK_SELECT_MAXPCLK 0x8
193195
#define XELPDP_DDI_CLOCK_SELECT_DIV18CLK 0x9
194196
#define XELPDP_DDI_CLOCK_SELECT_TBT_162 0xc
195197
#define XELPDP_DDI_CLOCK_SELECT_TBT_270 0xd
196198
#define XELPDP_DDI_CLOCK_SELECT_TBT_540 0xe
197199
#define XELPDP_DDI_CLOCK_SELECT_TBT_810 0xf
200+
#define XELPDP_DDI_CLOCK_SELECT_TBT_312_5 0x18
201+
#define XELPDP_DDI_CLOCK_SELECT_TBT_625 0x19
198202
#define XELPDP_FORWARD_CLOCK_UNGATE REG_BIT(10)
199203
#define XELPDP_LANE1_PHY_CLOCK_SELECT REG_BIT(8)
200204
#define XELPDP_SSC_ENABLE_PLLA REG_BIT(1)

‎drivers/gpu/drm/xe/regs/xe_engine_regs.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -83,6 +83,8 @@
8383
#define RING_IMR(base) XE_REG((base) + 0xa8)
8484
#define RING_INT_STATUS_RPT_PTR(base) XE_REG((base) + 0xac)
8585

86+
#define CS_INT_VEC(base) XE_REG((base) + 0x1b8)
87+
8688
#define RING_EIR(base) XE_REG((base) + 0xb0)
8789
#define RING_EMR(base) XE_REG((base) + 0xb4)
8890
#define RING_ESR(base) XE_REG((base) + 0xb8)
@@ -138,6 +140,7 @@
138140

139141
#define RING_MODE(base) XE_REG((base) + 0x29c)
140142
#define GFX_DISABLE_LEGACY_MODE REG_BIT(3)
143+
#define GFX_MSIX_INTERRUPT_ENABLE REG_BIT(13)
141144

142145
#define RING_TIMESTAMP(base) XE_REG((base) + 0x358)
143146

‎drivers/gpu/drm/xe/regs/xe_lrc_layout.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,9 @@
2525
#define CTX_INT_SRC_REPORT_REG (CTX_LRI_INT_REPORT_PTR + 3)
2626
#define CTX_INT_SRC_REPORT_PTR (CTX_LRI_INT_REPORT_PTR + 4)
2727

28+
#define CTX_CS_INT_VEC_REG 0x5a
29+
#define CTX_CS_INT_VEC_DATA (CTX_CS_INT_VEC_REG + 1)
30+
2831
#define INDIRECT_CTX_RING_HEAD (0x02 + 1)
2932
#define INDIRECT_CTX_RING_TAIL (0x04 + 1)
3033
#define INDIRECT_CTX_RING_START (0x06 + 1)

‎drivers/gpu/drm/xe/tests/xe_bo.c

Lines changed: 14 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -606,8 +606,6 @@ static void xe_bo_shrink_kunit(struct kunit *test)
606606
static struct kunit_case xe_bo_tests[] = {
607607
KUNIT_CASE_PARAM(xe_ccs_migrate_kunit, xe_pci_live_device_gen_param),
608608
KUNIT_CASE_PARAM(xe_bo_evict_kunit, xe_pci_live_device_gen_param),
609-
KUNIT_CASE_PARAM_ATTR(xe_bo_shrink_kunit, xe_pci_live_device_gen_param,
610-
{.speed = KUNIT_SPEED_SLOW}),
611609
{}
612610
};
613611

@@ -618,3 +616,17 @@ struct kunit_suite xe_bo_test_suite = {
618616
.init = xe_kunit_helper_xe_device_live_test_init,
619617
};
620618
EXPORT_SYMBOL_IF_KUNIT(xe_bo_test_suite);
619+
620+
static struct kunit_case xe_bo_shrink_test[] = {
621+
KUNIT_CASE_PARAM_ATTR(xe_bo_shrink_kunit, xe_pci_live_device_gen_param,
622+
{.speed = KUNIT_SPEED_SLOW}),
623+
{}
624+
};
625+
626+
VISIBLE_IF_KUNIT
627+
struct kunit_suite xe_bo_shrink_test_suite = {
628+
.name = "xe_bo_shrink",
629+
.test_cases = xe_bo_shrink_test,
630+
.init = xe_kunit_helper_xe_device_live_test_init,
631+
};
632+
EXPORT_SYMBOL_IF_KUNIT(xe_bo_shrink_test_suite);

‎drivers/gpu/drm/xe/tests/xe_live_test_mod.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,11 +6,13 @@
66
#include <kunit/test.h>
77

88
extern struct kunit_suite xe_bo_test_suite;
9+
extern struct kunit_suite xe_bo_shrink_test_suite;
910
extern struct kunit_suite xe_dma_buf_test_suite;
1011
extern struct kunit_suite xe_migrate_test_suite;
1112
extern struct kunit_suite xe_mocs_test_suite;
1213

1314
kunit_test_suite(xe_bo_test_suite);
15+
kunit_test_suite(xe_bo_shrink_test_suite);
1416
kunit_test_suite(xe_dma_buf_test_suite);
1517
kunit_test_suite(xe_migrate_test_suite);
1618
kunit_test_suite(xe_mocs_test_suite);

‎drivers/gpu/drm/xe/xe_bo.c

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -733,7 +733,7 @@ static int xe_bo_move(struct ttm_buffer_object *ttm_bo, bool evict,
733733
new_mem->mem_type == XE_PL_SYSTEM) {
734734
long timeout = dma_resv_wait_timeout(ttm_bo->base.resv,
735735
DMA_RESV_USAGE_BOOKKEEP,
736-
true,
736+
false,
737737
MAX_SCHEDULE_TIMEOUT);
738738
if (timeout < 0) {
739739
ret = timeout;
@@ -857,8 +857,16 @@ static int xe_bo_move(struct ttm_buffer_object *ttm_bo, bool evict,
857857

858858
out:
859859
if ((!ttm_bo->resource || ttm_bo->resource->mem_type == XE_PL_SYSTEM) &&
860-
ttm_bo->ttm)
860+
ttm_bo->ttm) {
861+
long timeout = dma_resv_wait_timeout(ttm_bo->base.resv,
862+
DMA_RESV_USAGE_KERNEL,
863+
false,
864+
MAX_SCHEDULE_TIMEOUT);
865+
if (timeout < 0)
866+
ret = timeout;
867+
861868
xe_tt_unmap_sg(ttm_bo->ttm);
869+
}
862870

863871
return ret;
864872
}

‎drivers/gpu/drm/xe/xe_devcoredump.c

Lines changed: 14 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -119,7 +119,11 @@ static ssize_t __xe_devcoredump_read(char *buffer, size_t count,
119119
drm_puts(&p, "\n**** GuC CT ****\n");
120120
xe_guc_ct_snapshot_print(ss->guc.ct, &p);
121121

122-
drm_puts(&p, "\n**** Contexts ****\n");
122+
/*
123+
* Don't add a new section header here because the mesa debug decoder
124+
* tool expects the context information to be in the 'GuC CT' section.
125+
*/
126+
/* drm_puts(&p, "\n**** Contexts ****\n"); */
123127
xe_guc_exec_queue_snapshot_print(ss->ge, &p);
124128

125129
drm_puts(&p, "\n**** Job ****\n");
@@ -416,6 +420,15 @@ void xe_print_blob_ascii85(struct drm_printer *p, const char *prefix,
416420
char buff[ASCII85_BUFSZ], *line_buff;
417421
size_t line_pos = 0;
418422

423+
/*
424+
* Splitting blobs across multiple lines is not compatible with the mesa
425+
* debug decoder tool. Note that even dropping the explicit '\n' below
426+
* doesn't help because the GuC log is so big some underlying implementation
427+
* still splits the lines at 512K characters. So just bail completely for
428+
* the moment.
429+
*/
430+
return;
431+
419432
#define DMESG_MAX_LINE_LEN 800
420433
#define MIN_SPACE (ASCII85_BUFSZ + 2) /* 85 + "\n\0" */
421434

‎drivers/gpu/drm/xe/xe_device.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -325,7 +325,9 @@ struct xe_device *xe_device_create(struct pci_dev *pdev,
325325
xe->info.revid = pdev->revision;
326326
xe->info.force_execlist = xe_modparam.force_execlist;
327327

328-
spin_lock_init(&xe->irq.lock);
328+
err = xe_irq_init(xe);
329+
if (err)
330+
goto err;
329331

330332
init_waitqueue_head(&xe->ufence_wq);
331333

‎drivers/gpu/drm/xe/xe_device.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -157,8 +157,7 @@ static inline bool xe_device_has_sriov(struct xe_device *xe)
157157

158158
static inline bool xe_device_has_msix(struct xe_device *xe)
159159
{
160-
/* TODO: change this when MSI-X support is fully integrated */
161-
return false;
160+
return xe->irq.msix.nvec > 0;
162161
}
163162

164163
static inline bool xe_device_has_memirq(struct xe_device *xe)

‎drivers/gpu/drm/xe/xe_device_types.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -348,6 +348,14 @@ struct xe_device {
348348

349349
/** @irq.enabled: interrupts enabled on this device */
350350
atomic_t enabled;
351+
352+
/** @irq.msix: irq info for platforms that support MSI-X */
353+
struct {
354+
/** @irq.msix.nvec: number of MSI-X interrupts */
355+
u16 nvec;
356+
/** @irq.msix.indexes: used to allocate MSI-X indexes */
357+
struct xarray indexes;
358+
} msix;
351359
} irq;
352360

353361
/** @ttm: ttm device */

‎drivers/gpu/drm/xe/xe_exec_queue.c

Lines changed: 15 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@
88
#include <linux/nospec.h>
99

1010
#include <drm/drm_device.h>
11+
#include <drm/drm_drv.h>
1112
#include <drm/drm_file.h>
1213
#include <uapi/drm/xe_drm.h>
1314

@@ -16,6 +17,7 @@
1617
#include "xe_hw_engine_class_sysfs.h"
1718
#include "xe_hw_engine_group.h"
1819
#include "xe_hw_fence.h"
20+
#include "xe_irq.h"
1921
#include "xe_lrc.h"
2022
#include "xe_macros.h"
2123
#include "xe_migrate.h"
@@ -68,6 +70,7 @@ static struct xe_exec_queue *__xe_exec_queue_alloc(struct xe_device *xe,
6870
q->gt = gt;
6971
q->class = hwe->class;
7072
q->width = width;
73+
q->msix_vec = XE_IRQ_DEFAULT_MSIX;
7174
q->logical_mask = logical_mask;
7275
q->fence_irq = &gt->fence_irq[hwe->class];
7376
q->ring_ops = gt->ring_ops[hwe->class];
@@ -117,7 +120,7 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q)
117120
}
118121

119122
for (i = 0; i < q->width; ++i) {
120-
q->lrc[i] = xe_lrc_create(q->hwe, q->vm, SZ_16K);
123+
q->lrc[i] = xe_lrc_create(q->hwe, q->vm, SZ_16K, q->msix_vec);
121124
if (IS_ERR(q->lrc[i])) {
122125
err = PTR_ERR(q->lrc[i]);
123126
goto err_unlock;
@@ -766,19 +769,21 @@ bool xe_exec_queue_is_idle(struct xe_exec_queue *q)
766769
*/
767770
void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q)
768771
{
769-
struct xe_file *xef;
772+
struct xe_device *xe = gt_to_xe(q->gt);
770773
struct xe_lrc *lrc;
771774
u32 old_ts, new_ts;
775+
int idx;
772776

773777
/*
774-
* Jobs that are run during driver load may use an exec_queue, but are
775-
* not associated with a user xe file, so avoid accumulating busyness
776-
* for kernel specific work.
778+
* Jobs that are executed by kernel doesn't have a corresponding xe_file
779+
* and thus are not accounted.
777780
*/
778-
if (!q->vm || !q->vm->xef)
781+
if (!q->xef)
779782
return;
780783

781-
xef = q->vm->xef;
784+
/* Synchronize with unbind while holding the xe file open */
785+
if (!drm_dev_enter(&xe->drm, &idx))
786+
return;
782787

783788
/*
784789
* Only sample the first LRC. For parallel submission, all of them are
@@ -790,7 +795,9 @@ void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q)
790795
*/
791796
lrc = q->lrc[0];
792797
new_ts = xe_lrc_update_timestamp(lrc, &old_ts);
793-
xef->run_ticks[q->class] += (new_ts - old_ts) * q->width;
798+
q->xef->run_ticks[q->class] += (new_ts - old_ts) * q->width;
799+
800+
drm_dev_exit(idx);
794801
}
795802

796803
/**

‎drivers/gpu/drm/xe/xe_exec_queue_types.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@ struct xe_exec_queue {
4141
/** @xef: Back pointer to xe file if this is user created exec queue */
4242
struct xe_file *xef;
4343

44-
/** @gt: graphics tile this exec queue can submit to */
44+
/** @gt: GT structure this exec queue can submit to */
4545
struct xe_gt *gt;
4646
/**
4747
* @hwe: A hardware of the same class. May (physical engine) or may not
@@ -63,6 +63,8 @@ struct xe_exec_queue {
6363
char name[MAX_FENCE_NAME_LEN];
6464
/** @width: width (number BB submitted per exec) of this exec queue */
6565
u16 width;
66+
/** @msix_vec: MSI-X vector (for platforms that support it) */
67+
u16 msix_vec;
6668
/** @fence_irq: fence IRQ used to signal job completion */
6769
struct xe_hw_fence_irq *fence_irq;
6870

‎drivers/gpu/drm/xe/xe_execlist.c

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@
1717
#include "xe_exec_queue.h"
1818
#include "xe_gt.h"
1919
#include "xe_hw_fence.h"
20+
#include "xe_irq.h"
2021
#include "xe_lrc.h"
2122
#include "xe_macros.h"
2223
#include "xe_mmio.h"
@@ -47,6 +48,7 @@ static void __start_lrc(struct xe_hw_engine *hwe, struct xe_lrc *lrc,
4748
struct xe_mmio *mmio = &gt->mmio;
4849
struct xe_device *xe = gt_to_xe(gt);
4950
u64 lrc_desc;
51+
u32 ring_mode = _MASKED_BIT_ENABLE(GFX_DISABLE_LEGACY_MODE);
5052

5153
lrc_desc = xe_lrc_descriptor(lrc);
5254

@@ -80,8 +82,10 @@ static void __start_lrc(struct xe_hw_engine *hwe, struct xe_lrc *lrc,
8082
xe_mmio_write32(mmio, RING_HWS_PGA(hwe->mmio_base),
8183
xe_bo_ggtt_addr(hwe->hwsp));
8284
xe_mmio_read32(mmio, RING_HWS_PGA(hwe->mmio_base));
83-
xe_mmio_write32(mmio, RING_MODE(hwe->mmio_base),
84-
_MASKED_BIT_ENABLE(GFX_DISABLE_LEGACY_MODE));
85+
86+
if (xe_device_has_msix(gt_to_xe(hwe->gt)))
87+
ring_mode |= _MASKED_BIT_ENABLE(GFX_MSIX_INTERRUPT_ENABLE);
88+
xe_mmio_write32(mmio, RING_MODE(hwe->mmio_base), ring_mode);
8589

8690
xe_mmio_write32(mmio, RING_EXECLIST_SQ_CONTENTS_LO(hwe->mmio_base),
8791
lower_32_bits(lrc_desc));
@@ -265,7 +269,7 @@ struct xe_execlist_port *xe_execlist_port_create(struct xe_device *xe,
265269

266270
port->hwe = hwe;
267271

268-
port->lrc = xe_lrc_create(hwe, NULL, SZ_16K);
272+
port->lrc = xe_lrc_create(hwe, NULL, SZ_16K, XE_IRQ_DEFAULT_MSIX);
269273
if (IS_ERR(port->lrc)) {
270274
err = PTR_ERR(port->lrc);
271275
goto err;

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