@@ -244,132 +244,6 @@ static void __exception_irq_entry mmp2_handle_irq(struct pt_regs *regs)
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generic_handle_domain_irq (icu_data [0 ].domain , hwirq );
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}
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- /* MMP (ARMv5) */
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- void __init icu_init_irq (void )
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- {
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- int irq ;
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-
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- max_icu_nr = 1 ;
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- mmp_icu_base = ioremap (0xd4282000 , 0x1000 );
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- icu_data [0 ].conf_enable = mmp_conf .conf_enable ;
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- icu_data [0 ].conf_disable = mmp_conf .conf_disable ;
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- icu_data [0 ].conf_mask = mmp_conf .conf_mask ;
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- icu_data [0 ].nr_irqs = 64 ;
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- icu_data [0 ].virq_base = 0 ;
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- icu_data [0 ].domain = irq_domain_add_legacy (NULL , 64 , 0 , 0 ,
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- & irq_domain_simple_ops ,
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- & icu_data [0 ]);
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- for (irq = 0 ; irq < 64 ; irq ++ ) {
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- icu_mask_irq (irq_get_irq_data (irq ));
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- irq_set_chip_and_handler (irq , & icu_irq_chip , handle_level_irq );
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- }
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- irq_set_default_host (icu_data [0 ].domain );
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- set_handle_irq (mmp_handle_irq );
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- }
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-
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- /* MMP2 (ARMv7) */
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- void __init mmp2_init_icu (void )
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- {
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- int irq , end ;
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-
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- max_icu_nr = 8 ;
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- mmp_icu_base = ioremap (0xd4282000 , 0x1000 );
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- icu_data [0 ].conf_enable = mmp2_conf .conf_enable ;
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- icu_data [0 ].conf_disable = mmp2_conf .conf_disable ;
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- icu_data [0 ].conf_mask = mmp2_conf .conf_mask ;
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- icu_data [0 ].nr_irqs = 64 ;
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- icu_data [0 ].virq_base = 0 ;
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- icu_data [0 ].domain = irq_domain_add_legacy (NULL , 64 , 0 , 0 ,
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- & irq_domain_simple_ops ,
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- & icu_data [0 ]);
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- icu_data [1 ].reg_status = mmp_icu_base + 0x150 ;
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- icu_data [1 ].reg_mask = mmp_icu_base + 0x168 ;
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- icu_data [1 ].clr_mfp_irq_base = icu_data [0 ].virq_base +
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- icu_data [0 ].nr_irqs ;
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- icu_data [1 ].clr_mfp_hwirq = 1 ; /* offset to IRQ_MMP2_PMIC_BASE */
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- icu_data [1 ].nr_irqs = 2 ;
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- icu_data [1 ].cascade_irq = 4 ;
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- icu_data [1 ].virq_base = icu_data [0 ].virq_base + icu_data [0 ].nr_irqs ;
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- icu_data [1 ].domain = irq_domain_add_legacy (NULL , icu_data [1 ].nr_irqs ,
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- icu_data [1 ].virq_base , 0 ,
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- & irq_domain_simple_ops ,
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- & icu_data [1 ]);
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- icu_data [2 ].reg_status = mmp_icu_base + 0x154 ;
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- icu_data [2 ].reg_mask = mmp_icu_base + 0x16c ;
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- icu_data [2 ].nr_irqs = 2 ;
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- icu_data [2 ].cascade_irq = 5 ;
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- icu_data [2 ].virq_base = icu_data [1 ].virq_base + icu_data [1 ].nr_irqs ;
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- icu_data [2 ].domain = irq_domain_add_legacy (NULL , icu_data [2 ].nr_irqs ,
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- icu_data [2 ].virq_base , 0 ,
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- & irq_domain_simple_ops ,
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- & icu_data [2 ]);
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- icu_data [3 ].reg_status = mmp_icu_base + 0x180 ;
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- icu_data [3 ].reg_mask = mmp_icu_base + 0x17c ;
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- icu_data [3 ].nr_irqs = 3 ;
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- icu_data [3 ].cascade_irq = 9 ;
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- icu_data [3 ].virq_base = icu_data [2 ].virq_base + icu_data [2 ].nr_irqs ;
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- icu_data [3 ].domain = irq_domain_add_legacy (NULL , icu_data [3 ].nr_irqs ,
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- icu_data [3 ].virq_base , 0 ,
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- & irq_domain_simple_ops ,
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- & icu_data [3 ]);
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- icu_data [4 ].reg_status = mmp_icu_base + 0x158 ;
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- icu_data [4 ].reg_mask = mmp_icu_base + 0x170 ;
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- icu_data [4 ].nr_irqs = 5 ;
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- icu_data [4 ].cascade_irq = 17 ;
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- icu_data [4 ].virq_base = icu_data [3 ].virq_base + icu_data [3 ].nr_irqs ;
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- icu_data [4 ].domain = irq_domain_add_legacy (NULL , icu_data [4 ].nr_irqs ,
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- icu_data [4 ].virq_base , 0 ,
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- & irq_domain_simple_ops ,
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- & icu_data [4 ]);
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- icu_data [5 ].reg_status = mmp_icu_base + 0x15c ;
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- icu_data [5 ].reg_mask = mmp_icu_base + 0x174 ;
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- icu_data [5 ].nr_irqs = 15 ;
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- icu_data [5 ].cascade_irq = 35 ;
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- icu_data [5 ].virq_base = icu_data [4 ].virq_base + icu_data [4 ].nr_irqs ;
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- icu_data [5 ].domain = irq_domain_add_legacy (NULL , icu_data [5 ].nr_irqs ,
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- icu_data [5 ].virq_base , 0 ,
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- & irq_domain_simple_ops ,
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- & icu_data [5 ]);
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- icu_data [6 ].reg_status = mmp_icu_base + 0x160 ;
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- icu_data [6 ].reg_mask = mmp_icu_base + 0x178 ;
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- icu_data [6 ].nr_irqs = 2 ;
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- icu_data [6 ].cascade_irq = 51 ;
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- icu_data [6 ].virq_base = icu_data [5 ].virq_base + icu_data [5 ].nr_irqs ;
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- icu_data [6 ].domain = irq_domain_add_legacy (NULL , icu_data [6 ].nr_irqs ,
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- icu_data [6 ].virq_base , 0 ,
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- & irq_domain_simple_ops ,
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- & icu_data [6 ]);
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- icu_data [7 ].reg_status = mmp_icu_base + 0x188 ;
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- icu_data [7 ].reg_mask = mmp_icu_base + 0x184 ;
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- icu_data [7 ].nr_irqs = 2 ;
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- icu_data [7 ].cascade_irq = 55 ;
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- icu_data [7 ].virq_base = icu_data [6 ].virq_base + icu_data [6 ].nr_irqs ;
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- icu_data [7 ].domain = irq_domain_add_legacy (NULL , icu_data [7 ].nr_irqs ,
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- icu_data [7 ].virq_base , 0 ,
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- & irq_domain_simple_ops ,
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- & icu_data [7 ]);
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- end = icu_data [7 ].virq_base + icu_data [7 ].nr_irqs ;
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- for (irq = 0 ; irq < end ; irq ++ ) {
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- icu_mask_irq (irq_get_irq_data (irq ));
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- if (irq == icu_data [1 ].cascade_irq ||
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- irq == icu_data [2 ].cascade_irq ||
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- irq == icu_data [3 ].cascade_irq ||
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- irq == icu_data [4 ].cascade_irq ||
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- irq == icu_data [5 ].cascade_irq ||
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- irq == icu_data [6 ].cascade_irq ||
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- irq == icu_data [7 ].cascade_irq ) {
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- irq_set_chip (irq , & icu_irq_chip );
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- irq_set_chained_handler (irq , icu_mux_irq_demux );
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- } else {
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- irq_set_chip_and_handler (irq , & icu_irq_chip ,
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- handle_level_irq );
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- }
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- }
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- irq_set_default_host (icu_data [0 ].domain );
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- set_handle_irq (mmp2_handle_irq );
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- }
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-
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- #ifdef CONFIG_OF
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static int __init mmp_init_bases (struct device_node * node )
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{
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int ret , nr_irqs , irq , i = 0 ;
@@ -548,4 +422,3 @@ static int __init mmp2_mux_of_init(struct device_node *node,
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return - EINVAL ;
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}
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IRQCHIP_DECLARE (mmp2_mux_intc , "mrvl,mmp2-mux-intc" , mmp2_mux_of_init );
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- #endif
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