Skip to content

Commit af030d8

Browse files
committed
dt-bindings: pinctrl: samsung: convert to dtschema
Convert the Samsung SoC (S3C24xx, S3C64xx, S5Pv210, Exynos) pin controller bindings to DT schema format. Parts of description and DTS example was copied from existing sources, so keep the license as GPL-2.0-only. Signed-off-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Sam Protsenko <[email protected]> Reviewed-by: Rob Herring <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Link: https://lore.kernel.org/r/[email protected]
1 parent a29681b commit af030d8

File tree

6 files changed

+611
-384
lines changed

6 files changed

+611
-384
lines changed
Lines changed: 52 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,52 @@
1+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl-gpio-bank.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: Samsung S3C/S5P/Exynos SoC pin controller - gpio bank
8+
9+
maintainers:
10+
- Krzysztof Kozlowski <[email protected]>
11+
- Sylwester Nawrocki <[email protected]>
12+
- Tomasz Figa <[email protected]>
13+
14+
description: |
15+
This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
16+
controller.
17+
18+
GPIO bank description for Samsung S3C/S5P/Exynos SoC pin controller.
19+
20+
See also Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml for
21+
additional information and example.
22+
23+
properties:
24+
'#gpio-cells':
25+
const: 2
26+
27+
gpio-controller: true
28+
29+
'#interrupt-cells':
30+
description:
31+
For GPIO banks supporting external GPIO interrupts or external wake-up
32+
interrupts.
33+
const: 2
34+
35+
interrupt-controller:
36+
description:
37+
For GPIO banks supporting external GPIO interrupts or external wake-up
38+
interrupts.
39+
40+
interrupts:
41+
description:
42+
For GPIO banks supporting direct external wake-up interrupts (without
43+
multiplexing). Number of interrupts must match number of wake-up capable
44+
pins of this bank.
45+
minItems: 1
46+
maxItems: 8
47+
48+
required:
49+
- '#gpio-cells'
50+
- gpio-controller
51+
52+
additionalProperties: false
Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,81 @@
1+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl-pins-cfg.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: Samsung S3C/S5P/Exynos SoC pin controller - pins configuration
8+
9+
maintainers:
10+
- Krzysztof Kozlowski <[email protected]>
11+
- Sylwester Nawrocki <[email protected]>
12+
- Tomasz Figa <[email protected]>
13+
14+
description: |
15+
This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
16+
controller.
17+
18+
Pins configuration for Samsung S3C/S5P/Exynos SoC pin controller.
19+
20+
The values used for config properties should be derived from the hardware
21+
manual and these values are programmed as-is into the pin pull up/down and
22+
driver strength register of the pin-controller.
23+
See also include/dt-bindings/pinctrl/samsung.h with useful constants.
24+
25+
See also Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml for
26+
additional information and example.
27+
28+
properties:
29+
samsung,pins:
30+
description: |
31+
List of pins to configure. For initial and sleep states, the maximum
32+
number is one pin. In other cases there is no upper limit.
33+
34+
The pins should use lowercase names matching hardware manual, e.g. for
35+
GPA0 bank: gpa0-0, gpa0-1, gpa0-2.
36+
$ref: /schemas/types.yaml#/definitions/string-array
37+
38+
samsung,pin-function:
39+
description: |
40+
The pin function selection that should be applied on the pins listed in the
41+
child node is specified using the "samsung,pin-function" property. The value
42+
of this property that should be applied to each of the pins listed in the
43+
"samsung,pins" property should be picked from the hardware manual of the SoC
44+
for the specified pin group. This property is optional in the child node if
45+
no specific function selection is desired for the pins listed in the child
46+
node. The value of this property is used as-is to program the pin-controller
47+
function selector register of the pin-bank.
48+
$ref: /schemas/types.yaml#/definitions/uint32
49+
minimum: 0
50+
maximum: 15
51+
52+
samsung,pin-drv:
53+
description: Drive strength configuration.
54+
$ref: /schemas/types.yaml#/definitions/uint32
55+
minimum: 0
56+
maximum: 15
57+
58+
samsung,pin-pud:
59+
description: Pull up/down configuration.
60+
$ref: /schemas/types.yaml#/definitions/uint32
61+
enum: [0, 1, 2, 3]
62+
63+
samsung,pin-val:
64+
description: Initial value of pin output buffer.
65+
$ref: /schemas/types.yaml#/definitions/uint32
66+
enum: [0, 1]
67+
68+
samsung,pin-con-pdn:
69+
description: Function in power down mode.
70+
$ref: /schemas/types.yaml#/definitions/uint32
71+
enum: [0, 1, 2, 3]
72+
73+
samsung,pin-pud-pdn:
74+
description: Pull up/down configuration in power down mode.
75+
$ref: /schemas/types.yaml#/definitions/uint32
76+
enum: [0, 1, 2, 3]
77+
78+
required:
79+
- samsung,pins
80+
81+
additionalProperties: false
Lines changed: 85 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,85 @@
1+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: Samsung S3C/S5P/Exynos SoC pin controller - wake-up interrupt controller
8+
9+
maintainers:
10+
- Krzysztof Kozlowski <[email protected]>
11+
- Sylwester Nawrocki <[email protected]>
12+
- Tomasz Figa <[email protected]>
13+
14+
description: |
15+
This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
16+
controller.
17+
18+
External wake-up interrupts for Samsung S3C/S5P/Exynos SoC pin controller.
19+
Only one pin-controller device node can include external wake-up interrupts
20+
child node (in other words, only one External wake-up interrupts
21+
pin-controller is supported).
22+
23+
See also Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml for
24+
additional information and example.
25+
26+
properties:
27+
compatible:
28+
enum:
29+
- samsung,s3c2410-wakeup-eint
30+
- samsung,s3c2412-wakeup-eint
31+
- samsung,s3c64xx-wakeup-eint
32+
- samsung,s5pv210-wakeup-eint
33+
- samsung,exynos4210-wakeup-eint
34+
- samsung,exynos7-wakeup-eint
35+
36+
interrupts:
37+
description:
38+
Interrupt used by multiplexed external wake-up interrupts.
39+
minItems: 1
40+
maxItems: 6
41+
42+
required:
43+
- compatible
44+
- interrupts
45+
46+
allOf:
47+
- if:
48+
properties:
49+
compatible:
50+
contains:
51+
enum:
52+
- samsung,s3c2410-wakeup-eint
53+
- samsung,s3c2412-wakeup-eint
54+
then:
55+
properties:
56+
interrupts:
57+
minItems: 6
58+
maxItems: 6
59+
60+
- if:
61+
properties:
62+
compatible:
63+
contains:
64+
const: samsung,s3c64xx-wakeup-eint
65+
then:
66+
properties:
67+
interrupts:
68+
minItems: 4
69+
maxItems: 4
70+
71+
- if:
72+
properties:
73+
compatible:
74+
contains:
75+
enum:
76+
- samsung,s5pv210-wakeup-eint
77+
- samsung,exynos4210-wakeup-eint
78+
- samsung,exynos7-wakeup-eint
79+
then:
80+
properties:
81+
interrupts:
82+
minItems: 1
83+
maxItems: 1
84+
85+
additionalProperties: false

0 commit comments

Comments
 (0)