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xry111chenhuacai
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LoongArch: Fix and simplify fcsr initialization on execve()
There has been a lingering bug in LoongArch Linux systems causing some GCC tests to intermittently fail (see Closes link). I've made a minimal reproducer: zsh% cat measure.s .align 4 .globl _start _start: movfcsr2gr $a0, $fcsr0 bstrpick.w $a0, $a0, 16, 16 beqz $a0, .ok break 0 .ok: li.w $a7, 93 syscall 0 zsh% cc mesaure.s -o measure -nostdlib zsh% echo $((1.0/3)) 0.33333333333333331 zsh% while ./measure; do ; done This while loop should not stop as POSIX is clear that execve must set fenv to the default, where FCSR should be zero. But in fact it will just stop after running for a while (normally less than 30 seconds). Note that "$((1.0/3))" is needed to reproduce this issue because it raises FE_INVALID and makes fcsr0 non-zero. The problem is we are currently relying on SET_PERSONALITY2() to reset current->thread.fpu.fcsr. But SET_PERSONALITY2() is executed before start_thread which calls lose_fpu(0). We can see if kernel preempt is enabled, we may switch to another thread after SET_PERSONALITY2() but before lose_fpu(0). Then bad thing happens: during the thread switch the value of the fcsr0 register is stored into current->thread.fpu.fcsr, making it dirty again. The issue can be fixed by setting current->thread.fpu.fcsr after lose_fpu(0) because lose_fpu() clears TIF_USEDFPU, then the thread switch won't touch current->thread.fpu.fcsr. The only other architecture setting FCSR in SET_PERSONALITY2() is MIPS. I've ran a similar test on MIPS with mainline kernel and it turns out MIPS is buggy, too. Anyway MIPS do this for supporting different FP flavors (NaN encodings, etc.) which do not exist on LoongArch. So for LoongArch, we can simply remove the current->thread.fpu.fcsr setting from SET_PERSONALITY2() and do it in start_thread(), after lose_fpu(0). The while loop failing with the mainline kernel has survived one hour after this change on LoongArch. Fixes: 803b0fc ("LoongArch: Add process management") Closes: loongson-community/discussions#7 Link: https://lore.kernel.org/linux-mips/[email protected]/ Cc: [email protected] Signed-off-by: Xi Ruoyao <[email protected]> Signed-off-by: Huacai Chen <[email protected]>
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arch/loongarch/include/asm/elf.h

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@@ -241,8 +241,6 @@ void loongarch_dump_regs64(u64 *uregs, const struct pt_regs *regs);
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do { \
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current->thread.vdso = &vdso_info; \
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\
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loongarch_set_personality_fcsr(state); \
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\
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if (personality(current->personality) != PER_LINUX) \
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set_personality(PER_LINUX); \
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} while (0)
@@ -259,7 +257,6 @@ do { \
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clear_thread_flag(TIF_32BIT_ADDR); \
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\
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current->thread.vdso = &vdso_info; \
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loongarch_set_personality_fcsr(state); \
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\
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p = personality(current->personality); \
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if (p != PER_LINUX32 && p != PER_LINUX) \
@@ -340,6 +337,4 @@ extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf,
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extern int arch_check_elf(void *ehdr, bool has_interpreter, void *interp_ehdr,
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struct arch_elf_state *state);
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extern void loongarch_set_personality_fcsr(struct arch_elf_state *state);
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#endif /* _ASM_ELF_H */

arch/loongarch/kernel/elf.c

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@@ -23,8 +23,3 @@ int arch_check_elf(void *_ehdr, bool has_interpreter, void *_interp_ehdr,
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{
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return 0;
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}
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void loongarch_set_personality_fcsr(struct arch_elf_state *state)
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{
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current->thread.fpu.fcsr = boot_cpu_data.fpu_csr0;
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}

arch/loongarch/kernel/process.c

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@@ -85,6 +85,7 @@ void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp)
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regs->csr_euen = euen;
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lose_fpu(0);
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lose_lbt(0);
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current->thread.fpu.fcsr = boot_cpu_data.fpu_csr0;
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clear_thread_flag(TIF_LSX_CTX_LIVE);
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clear_thread_flag(TIF_LASX_CTX_LIVE);

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