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Merge tag 'drm-fixes-2024-05-11' of https://gitlab.freedesktop.org/drm/kernel
Pull drm fixes from Dave Airlie: "This should be the last set of fixes for 6.9, i915, xe and amdgpu are the bulk here, one of the previous nouveau fixes turned up an issue, so reverting it, otherwise one core and a couple of meson fixes. core: - fix connector debugging output i915: - Automate CCS Mode setting during engine resets - Fix audio time stamp programming for DP - Fix parsing backlight BDB data xe: - Fix use zero-length element array - Move more from system wq to ordered private wq - Do not ignore return for drmm_mutex_init amdgpu: - DCN 3.5 fix - MST DSC fixes - S0i3 fix - S4 fix - HDP MMIO mapping fix - Fix a regression in visible vram handling amdkfd: - Spatial partition fix meson: - dw-hdmi: power-up fixes - dw-hdmi: add badngap setting for g12 nouveau: - revert SG_DEBUG fix that has a side effect" * tag 'drm-fixes-2024-05-11' of https://gitlab.freedesktop.org/drm/kernel: Revert "drm/nouveau/firmware: Fix SG_DEBUG error with nvkm_firmware_ctor()" drm/amdgpu: Fix comparison in amdgpu_res_cpu_visible drm/amdkfd: don't allow mapping the MMIO HDP page with large pages drm/xe: Use ordered WQ for G2H handler drm/xe/guc: Check error code when initializing the CT mutex drm/xe/ads: Use flexible-array Revert "drm/amdkfd: Add partition id field to location_id" dm/amd/pm: Fix problems with reboot/shutdown for some SMU 13.0.4/13.0.11 users drm/amd/display: MST DSC check for older devices drm/amd/display: Fix idle optimization checks for multi-display and dual eDP drm/amd/display: Fix DSC-re-computing drm/amd/display: Enable urgent latency adjustments for DCN35 drm/connector: Add \n to message about demoting connector force-probes drm/i915/bios: Fix parsing backlight BDB data drm/i915/audio: Fix audio time stamp programming for DP drm/i915/gt: Automate CCS Mode setting during engine resets drm/meson: dw-hdmi: add bandgap setting for g12 drm/meson: dw-hdmi: power up phy on device init
2 parents c22c3e0 + a222a64 commit cf87f46

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-203
lines changed

20 files changed

+122
-203
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -427,7 +427,7 @@ bool amdgpu_res_cpu_visible(struct amdgpu_device *adev,
427427

428428
amdgpu_res_first(res, 0, res->size, &cursor);
429429
while (cursor.remaining) {
430-
if ((cursor.start + cursor.size) >= adev->gmc.visible_vram_size)
430+
if ((cursor.start + cursor.size) > adev->gmc.visible_vram_size)
431431
return false;
432432
amdgpu_res_next(&cursor, cursor.size);
433433
}

‎drivers/gpu/drm/amd/amdkfd/kfd_chardev.c

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1139,7 +1139,7 @@ static int kfd_ioctl_alloc_memory_of_gpu(struct file *filep,
11391139
goto err_unlock;
11401140
}
11411141
offset = dev->adev->rmmio_remap.bus_addr;
1142-
if (!offset) {
1142+
if (!offset || (PAGE_SIZE > 4096)) {
11431143
err = -ENOMEM;
11441144
goto err_unlock;
11451145
}
@@ -2307,7 +2307,7 @@ static int criu_restore_memory_of_gpu(struct kfd_process_device *pdd,
23072307
return -EINVAL;
23082308
}
23092309
offset = pdd->dev->adev->rmmio_remap.bus_addr;
2310-
if (!offset) {
2310+
if (!offset || (PAGE_SIZE > 4096)) {
23112311
pr_err("amdgpu_amdkfd_get_mmio_remap_phys_addr failed\n");
23122312
return -ENOMEM;
23132313
}
@@ -3349,6 +3349,9 @@ static int kfd_mmio_mmap(struct kfd_node *dev, struct kfd_process *process,
33493349
if (vma->vm_end - vma->vm_start != PAGE_SIZE)
33503350
return -EINVAL;
33513351

3352+
if (PAGE_SIZE > 4096)
3353+
return -EINVAL;
3354+
33523355
address = dev->adev->rmmio_remap.bus_addr;
33533356

33543357
vm_flags_set(vma, VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE |

‎drivers/gpu/drm/amd/amdkfd/kfd_topology.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1997,9 +1997,8 @@ int kfd_topology_add_device(struct kfd_node *gpu)
19971997
HSA_CAP_ASIC_REVISION_MASK);
19981998

19991999
dev->node_props.location_id = pci_dev_id(gpu->adev->pdev);
2000-
/* On multi-partition nodes, node id = location_id[31:28] */
2001-
if (gpu->kfd->num_nodes > 1)
2002-
dev->node_props.location_id |= (dev->gpu->node_id << 28);
2000+
if (KFD_GC_VERSION(dev->gpu->kfd) == IP_VERSION(9, 4, 3))
2001+
dev->node_props.location_id |= dev->gpu->node_id;
20032002

20042003
dev->node_props.domain = pci_domain_nr(gpu->adev->pdev->bus);
20052004
dev->node_props.max_engine_clk_fcompute =

‎drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

Lines changed: 13 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1219,8 +1219,10 @@ static bool is_dsc_need_re_compute(
12191219
if (dc_link->type != dc_connection_mst_branch)
12201220
return false;
12211221

1222-
if (!(dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT ||
1223-
dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT))
1222+
/* add a check for older MST DSC with no virtual DPCDs */
1223+
if (needs_dsc_aux_workaround(dc_link) &&
1224+
(!(dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT ||
1225+
dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT)))
12241226
return false;
12251227

12261228
for (i = 0; i < MAX_PIPES; i++)
@@ -1240,7 +1242,15 @@ static bool is_dsc_need_re_compute(
12401242
continue;
12411243

12421244
aconnector = (struct amdgpu_dm_connector *) stream->dm_stream_context;
1243-
if (!aconnector)
1245+
if (!aconnector || !aconnector->dsc_aux)
1246+
continue;
1247+
1248+
/*
1249+
* check if cached virtual MST DSC caps are available and DSC is supported
1250+
* as per specifications in their Virtual DPCD registers.
1251+
*/
1252+
if (!(aconnector->dc_sink->dsc_caps.dsc_dec_caps.is_dsc_supported ||
1253+
aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT))
12441254
continue;
12451255

12461256
stream_on_link[new_stream_on_link_num] = aconnector;

‎drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -195,9 +195,9 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_5_soc = {
195195
.dcn_downspread_percent = 0.5,
196196
.gpuvm_min_page_size_bytes = 4096,
197197
.hostvm_min_page_size_bytes = 4096,
198-
.do_urgent_latency_adjustment = 0,
198+
.do_urgent_latency_adjustment = 1,
199199
.urgent_latency_adjustment_fabric_clock_component_us = 0,
200-
.urgent_latency_adjustment_fabric_clock_reference_mhz = 0,
200+
.urgent_latency_adjustment_fabric_clock_reference_mhz = 3000,
201201
};
202202

203203
void dcn35_build_wm_range_table_fpu(struct clk_mgr *clk_mgr)

‎drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

Lines changed: 27 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -638,22 +638,43 @@ void dcn35_power_down_on_boot(struct dc *dc)
638638

639639
bool dcn35_apply_idle_power_optimizations(struct dc *dc, bool enable)
640640
{
641-
struct dc_link *edp_links[MAX_NUM_EDP];
642-
int i, edp_num;
643641
if (dc->debug.dmcub_emulation)
644642
return true;
645643

646644
if (enable) {
647-
dc_get_edp_links(dc, edp_links, &edp_num);
648-
if (edp_num == 0 || edp_num > 1)
649-
return false;
645+
uint32_t num_active_edp = 0;
646+
int i;
650647

651648
for (i = 0; i < dc->current_state->stream_count; ++i) {
652649
struct dc_stream_state *stream = dc->current_state->streams[i];
650+
struct dc_link *link = stream->link;
651+
bool is_psr = link && !link->panel_config.psr.disable_psr &&
652+
(link->psr_settings.psr_version == DC_PSR_VERSION_1 ||
653+
link->psr_settings.psr_version == DC_PSR_VERSION_SU_1);
654+
bool is_replay = link && link->replay_settings.replay_feature_enabled;
655+
656+
/* Ignore streams that disabled. */
657+
if (stream->dpms_off)
658+
continue;
659+
660+
/* Active external displays block idle optimizations. */
661+
if (!dc_is_embedded_signal(stream->signal))
662+
return false;
663+
664+
/* If not PWRSEQ0 can't enter idle optimizations */
665+
if (link && link->link_index != 0)
666+
return false;
653667

654-
if (!stream->dpms_off && !dc_is_embedded_signal(stream->signal))
668+
/* Check for panel power features required for idle optimizations. */
669+
if (!is_psr && !is_replay)
655670
return false;
671+
672+
num_active_edp += 1;
656673
}
674+
675+
/* If more than one active eDP then disallow. */
676+
if (num_active_edp > 1)
677+
return false;
657678
}
658679

659680
// TODO: review other cases when idle optimization is allowed

‎drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -226,7 +226,7 @@ static int smu_v13_0_4_system_features_control(struct smu_context *smu, bool en)
226226
struct amdgpu_device *adev = smu->adev;
227227
int ret = 0;
228228

229-
if (!en && !adev->in_s0ix) {
229+
if (!en && adev->in_s4) {
230230
/* Adds a GFX reset as workaround just before sending the
231231
* MP1_UNLOAD message to prevent GC/RLC/PMFW from entering
232232
* an invalid state.

‎drivers/gpu/drm/drm_connector.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2940,7 +2940,7 @@ int drm_mode_getconnector(struct drm_device *dev, void *data,
29402940
dev->mode_config.max_width,
29412941
dev->mode_config.max_height);
29422942
else
2943-
drm_dbg_kms(dev, "User-space requested a forced probe on [CONNECTOR:%d:%s] but is not the DRM master, demoting to read-only probe",
2943+
drm_dbg_kms(dev, "User-space requested a forced probe on [CONNECTOR:%d:%s] but is not the DRM master, demoting to read-only probe\n",
29442944
connector->base.id, connector->name);
29452945
}
29462946

‎drivers/gpu/drm/i915/display/intel_audio.c

Lines changed: 8 additions & 105 deletions
Original file line numberDiff line numberDiff line change
@@ -76,80 +76,13 @@ struct intel_audio_funcs {
7676
struct intel_crtc_state *crtc_state);
7777
};
7878

79-
/* DP N/M table */
80-
#define LC_810M 810000
81-
#define LC_540M 540000
82-
#define LC_270M 270000
83-
#define LC_162M 162000
84-
85-
struct dp_aud_n_m {
86-
int sample_rate;
87-
int clock;
88-
u16 m;
89-
u16 n;
90-
};
91-
9279
struct hdmi_aud_ncts {
9380
int sample_rate;
9481
int clock;
9582
int n;
9683
int cts;
9784
};
9885

99-
/* Values according to DP 1.4 Table 2-104 */
100-
static const struct dp_aud_n_m dp_aud_n_m[] = {
101-
{ 32000, LC_162M, 1024, 10125 },
102-
{ 44100, LC_162M, 784, 5625 },
103-
{ 48000, LC_162M, 512, 3375 },
104-
{ 64000, LC_162M, 2048, 10125 },
105-
{ 88200, LC_162M, 1568, 5625 },
106-
{ 96000, LC_162M, 1024, 3375 },
107-
{ 128000, LC_162M, 4096, 10125 },
108-
{ 176400, LC_162M, 3136, 5625 },
109-
{ 192000, LC_162M, 2048, 3375 },
110-
{ 32000, LC_270M, 1024, 16875 },
111-
{ 44100, LC_270M, 784, 9375 },
112-
{ 48000, LC_270M, 512, 5625 },
113-
{ 64000, LC_270M, 2048, 16875 },
114-
{ 88200, LC_270M, 1568, 9375 },
115-
{ 96000, LC_270M, 1024, 5625 },
116-
{ 128000, LC_270M, 4096, 16875 },
117-
{ 176400, LC_270M, 3136, 9375 },
118-
{ 192000, LC_270M, 2048, 5625 },
119-
{ 32000, LC_540M, 1024, 33750 },
120-
{ 44100, LC_540M, 784, 18750 },
121-
{ 48000, LC_540M, 512, 11250 },
122-
{ 64000, LC_540M, 2048, 33750 },
123-
{ 88200, LC_540M, 1568, 18750 },
124-
{ 96000, LC_540M, 1024, 11250 },
125-
{ 128000, LC_540M, 4096, 33750 },
126-
{ 176400, LC_540M, 3136, 18750 },
127-
{ 192000, LC_540M, 2048, 11250 },
128-
{ 32000, LC_810M, 1024, 50625 },
129-
{ 44100, LC_810M, 784, 28125 },
130-
{ 48000, LC_810M, 512, 16875 },
131-
{ 64000, LC_810M, 2048, 50625 },
132-
{ 88200, LC_810M, 1568, 28125 },
133-
{ 96000, LC_810M, 1024, 16875 },
134-
{ 128000, LC_810M, 4096, 50625 },
135-
{ 176400, LC_810M, 3136, 28125 },
136-
{ 192000, LC_810M, 2048, 16875 },
137-
};
138-
139-
static const struct dp_aud_n_m *
140-
audio_config_dp_get_n_m(const struct intel_crtc_state *crtc_state, int rate)
141-
{
142-
int i;
143-
144-
for (i = 0; i < ARRAY_SIZE(dp_aud_n_m); i++) {
145-
if (rate == dp_aud_n_m[i].sample_rate &&
146-
crtc_state->port_clock == dp_aud_n_m[i].clock)
147-
return &dp_aud_n_m[i];
148-
}
149-
150-
return NULL;
151-
}
152-
15386
static const struct {
15487
int clock;
15588
u32 config;
@@ -387,47 +320,17 @@ hsw_dp_audio_config_update(struct intel_encoder *encoder,
387320
const struct intel_crtc_state *crtc_state)
388321
{
389322
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
390-
struct i915_audio_component *acomp = i915->display.audio.component;
391323
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
392-
enum port port = encoder->port;
393-
const struct dp_aud_n_m *nm;
394-
int rate;
395-
u32 tmp;
396-
397-
rate = acomp ? acomp->aud_sample_rate[port] : 0;
398-
nm = audio_config_dp_get_n_m(crtc_state, rate);
399-
if (nm)
400-
drm_dbg_kms(&i915->drm, "using Maud %u, Naud %u\n", nm->m,
401-
nm->n);
402-
else
403-
drm_dbg_kms(&i915->drm, "using automatic Maud, Naud\n");
404-
405-
tmp = intel_de_read(i915, HSW_AUD_CFG(cpu_transcoder));
406-
tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
407-
tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;
408-
tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
409-
tmp |= AUD_CONFIG_N_VALUE_INDEX;
410324

411-
if (nm) {
412-
tmp &= ~AUD_CONFIG_N_MASK;
413-
tmp |= AUD_CONFIG_N(nm->n);
414-
tmp |= AUD_CONFIG_N_PROG_ENABLE;
415-
}
416-
417-
intel_de_write(i915, HSW_AUD_CFG(cpu_transcoder), tmp);
418-
419-
tmp = intel_de_read(i915, HSW_AUD_M_CTS_ENABLE(cpu_transcoder));
420-
tmp &= ~AUD_CONFIG_M_MASK;
421-
tmp &= ~AUD_M_CTS_M_VALUE_INDEX;
422-
tmp &= ~AUD_M_CTS_M_PROG_ENABLE;
423-
424-
if (nm) {
425-
tmp |= nm->m;
426-
tmp |= AUD_M_CTS_M_VALUE_INDEX;
427-
tmp |= AUD_M_CTS_M_PROG_ENABLE;
428-
}
325+
/* Enable time stamps. Let HW calculate Maud/Naud values */
326+
intel_de_rmw(i915, HSW_AUD_CFG(cpu_transcoder),
327+
AUD_CONFIG_N_VALUE_INDEX |
328+
AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK |
329+
AUD_CONFIG_UPPER_N_MASK |
330+
AUD_CONFIG_LOWER_N_MASK |
331+
AUD_CONFIG_N_PROG_ENABLE,
332+
AUD_CONFIG_N_VALUE_INDEX);
429333

430-
intel_de_write(i915, HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp);
431334
}
432335

433336
static void

‎drivers/gpu/drm/i915/display/intel_bios.c

Lines changed: 4 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1042,22 +1042,11 @@ parse_lfp_backlight(struct drm_i915_private *i915,
10421042
panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
10431043
panel->vbt.backlight.controller = 0;
10441044
if (i915->display.vbt.version >= 191) {
1045-
size_t exp_size;
1045+
const struct lfp_backlight_control_method *method;
10461046

1047-
if (i915->display.vbt.version >= 236)
1048-
exp_size = sizeof(struct bdb_lfp_backlight_data);
1049-
else if (i915->display.vbt.version >= 234)
1050-
exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
1051-
else
1052-
exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
1053-
1054-
if (get_blocksize(backlight_data) >= exp_size) {
1055-
const struct lfp_backlight_control_method *method;
1056-
1057-
method = &backlight_data->backlight_control[panel_type];
1058-
panel->vbt.backlight.type = method->type;
1059-
panel->vbt.backlight.controller = method->controller;
1060-
}
1047+
method = &backlight_data->backlight_control[panel_type];
1048+
panel->vbt.backlight.type = method->type;
1049+
panel->vbt.backlight.controller = method->controller;
10611050
}
10621051

10631052
panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;

‎drivers/gpu/drm/i915/display/intel_vbt_defs.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -897,11 +897,6 @@ struct lfp_brightness_level {
897897
u16 reserved;
898898
} __packed;
899899

900-
#define EXP_BDB_LFP_BL_DATA_SIZE_REV_191 \
901-
offsetof(struct bdb_lfp_backlight_data, brightness_level)
902-
#define EXP_BDB_LFP_BL_DATA_SIZE_REV_234 \
903-
offsetof(struct bdb_lfp_backlight_data, brightness_precision_bits)
904-
905900
struct bdb_lfp_backlight_data {
906901
u8 entry_size;
907902
struct lfp_backlight_data_entry data[16];

‎drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -8,14 +8,14 @@
88
#include "intel_gt_ccs_mode.h"
99
#include "intel_gt_regs.h"
1010

11-
void intel_gt_apply_ccs_mode(struct intel_gt *gt)
11+
unsigned int intel_gt_apply_ccs_mode(struct intel_gt *gt)
1212
{
1313
int cslice;
1414
u32 mode = 0;
1515
int first_ccs = __ffs(CCS_MASK(gt));
1616

1717
if (!IS_DG2(gt->i915))
18-
return;
18+
return 0;
1919

2020
/* Build the value for the fixed CCS load balancing */
2121
for (cslice = 0; cslice < I915_MAX_CCS; cslice++) {
@@ -35,5 +35,5 @@ void intel_gt_apply_ccs_mode(struct intel_gt *gt)
3535
XEHP_CCS_MODE_CSLICE_MASK);
3636
}
3737

38-
intel_uncore_write(gt->uncore, XEHP_CCS_MODE, mode);
38+
return mode;
3939
}

‎drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,6 @@
88

99
struct intel_gt;
1010

11-
void intel_gt_apply_ccs_mode(struct intel_gt *gt);
11+
unsigned int intel_gt_apply_ccs_mode(struct intel_gt *gt);
1212

1313
#endif /* __INTEL_GT_CCS_MODE_H__ */

‎drivers/gpu/drm/i915/gt/intel_workarounds.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2859,6 +2859,7 @@ add_render_compute_tuning_settings(struct intel_gt *gt,
28592859
static void ccs_engine_wa_mode(struct intel_engine_cs *engine, struct i915_wa_list *wal)
28602860
{
28612861
struct intel_gt *gt = engine->gt;
2862+
u32 mode;
28622863

28632864
if (!IS_DG2(gt->i915))
28642865
return;
@@ -2875,7 +2876,8 @@ static void ccs_engine_wa_mode(struct intel_engine_cs *engine, struct i915_wa_li
28752876
* After having disabled automatic load balancing we need to
28762877
* assign all slices to a single CCS. We will call it CCS mode 1
28772878
*/
2878-
intel_gt_apply_ccs_mode(gt);
2879+
mode = intel_gt_apply_ccs_mode(gt);
2880+
wa_masked_en(wal, XEHP_CCS_MODE, mode);
28792881
}
28802882

28812883
/*

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