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mitadavem330
mita
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net: w5100: move mmiowb into register access callbacks
Instead of sprinkle mmiowb over the driver code, move it into primary register write callbacks. (w5100_write, w5100_write16, w5100_writebuf) This is a preparation for supporting SPI interface which doesn't use MMIO for accessing w5100 registers. Signed-off-by: Akinobu Mita <[email protected]> Cc: Mike Sinkovsky <[email protected]> Cc: David S. Miller <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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‎drivers/net/ethernet/wiznet/w5100.c

Lines changed: 15 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -122,10 +122,17 @@ static inline u8 w5100_read_direct(struct w5100_priv *priv, u16 addr)
122122
return ioread8(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
123123
}
124124

125+
static inline void __w5100_write_direct(struct w5100_priv *priv, u16 addr,
126+
u8 data)
127+
{
128+
iowrite8(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
129+
}
130+
125131
static inline void w5100_write_direct(struct w5100_priv *priv,
126132
u16 addr, u8 data)
127133
{
128-
iowrite8(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
134+
__w5100_write_direct(priv, addr, data);
135+
mmiowb();
129136
}
130137

131138
static u16 w5100_read16_direct(struct w5100_priv *priv, u16 addr)
@@ -138,8 +145,9 @@ static u16 w5100_read16_direct(struct w5100_priv *priv, u16 addr)
138145

139146
static void w5100_write16_direct(struct w5100_priv *priv, u16 addr, u16 data)
140147
{
141-
w5100_write_direct(priv, addr, data >> 8);
142-
w5100_write_direct(priv, addr + 1, data);
148+
__w5100_write_direct(priv, addr, data >> 8);
149+
__w5100_write_direct(priv, addr + 1, data);
150+
mmiowb();
143151
}
144152

145153
static void w5100_readbuf_direct(struct w5100_priv *priv,
@@ -164,8 +172,9 @@ static void w5100_writebuf_direct(struct w5100_priv *priv,
164172
for (i = 0; i < len; i++, addr++) {
165173
if (unlikely(addr > W5100_TX_MEM_END))
166174
addr = W5100_TX_MEM_START;
167-
w5100_write_direct(priv, addr, *buf++);
175+
__w5100_write_direct(priv, addr, *buf++);
168176
}
177+
mmiowb();
169178
}
170179

171180
/*
@@ -186,7 +195,6 @@ static u8 w5100_read_indirect(struct w5100_priv *priv, u16 addr)
186195

187196
spin_lock_irqsave(&priv->reg_lock, flags);
188197
w5100_write16_direct(priv, W5100_IDM_AR, addr);
189-
mmiowb();
190198
data = w5100_read_direct(priv, W5100_IDM_DR);
191199
spin_unlock_irqrestore(&priv->reg_lock, flags);
192200

@@ -199,9 +207,7 @@ static void w5100_write_indirect(struct w5100_priv *priv, u16 addr, u8 data)
199207

200208
spin_lock_irqsave(&priv->reg_lock, flags);
201209
w5100_write16_direct(priv, W5100_IDM_AR, addr);
202-
mmiowb();
203210
w5100_write_direct(priv, W5100_IDM_DR, data);
204-
mmiowb();
205211
spin_unlock_irqrestore(&priv->reg_lock, flags);
206212
}
207213

@@ -212,7 +218,6 @@ static u16 w5100_read16_indirect(struct w5100_priv *priv, u16 addr)
212218

213219
spin_lock_irqsave(&priv->reg_lock, flags);
214220
w5100_write16_direct(priv, W5100_IDM_AR, addr);
215-
mmiowb();
216221
data = w5100_read_direct(priv, W5100_IDM_DR) << 8;
217222
data |= w5100_read_direct(priv, W5100_IDM_DR);
218223
spin_unlock_irqrestore(&priv->reg_lock, flags);
@@ -226,10 +231,8 @@ static void w5100_write16_indirect(struct w5100_priv *priv, u16 addr, u16 data)
226231

227232
spin_lock_irqsave(&priv->reg_lock, flags);
228233
w5100_write16_direct(priv, W5100_IDM_AR, addr);
229-
mmiowb();
230-
w5100_write_direct(priv, W5100_IDM_DR, data >> 8);
234+
__w5100_write_direct(priv, W5100_IDM_DR, data >> 8);
231235
w5100_write_direct(priv, W5100_IDM_DR, data);
232-
mmiowb();
233236
spin_unlock_irqrestore(&priv->reg_lock, flags);
234237
}
235238

@@ -242,13 +245,11 @@ static void w5100_readbuf_indirect(struct w5100_priv *priv,
242245

243246
spin_lock_irqsave(&priv->reg_lock, flags);
244247
w5100_write16_direct(priv, W5100_IDM_AR, addr);
245-
mmiowb();
246248

247249
for (i = 0; i < len; i++, addr++) {
248250
if (unlikely(addr > W5100_RX_MEM_END)) {
249251
addr = W5100_RX_MEM_START;
250252
w5100_write16_direct(priv, W5100_IDM_AR, addr);
251-
mmiowb();
252253
}
253254
*buf++ = w5100_read_direct(priv, W5100_IDM_DR);
254255
}
@@ -265,15 +266,13 @@ static void w5100_writebuf_indirect(struct w5100_priv *priv,
265266

266267
spin_lock_irqsave(&priv->reg_lock, flags);
267268
w5100_write16_direct(priv, W5100_IDM_AR, addr);
268-
mmiowb();
269269

270270
for (i = 0; i < len; i++, addr++) {
271271
if (unlikely(addr > W5100_TX_MEM_END)) {
272272
addr = W5100_TX_MEM_START;
273273
w5100_write16_direct(priv, W5100_IDM_AR, addr);
274-
mmiowb();
275274
}
276-
w5100_write_direct(priv, W5100_IDM_DR, *buf++);
275+
__w5100_write_direct(priv, W5100_IDM_DR, *buf++);
277276
}
278277
mmiowb();
279278
spin_unlock_irqrestore(&priv->reg_lock, flags);
@@ -309,7 +308,6 @@ static int w5100_command(struct w5100_priv *priv, u16 cmd)
309308
unsigned long timeout = jiffies + msecs_to_jiffies(100);
310309

311310
w5100_write(priv, W5100_S0_CR, cmd);
312-
mmiowb();
313311

314312
while (w5100_read(priv, W5100_S0_CR) != 0) {
315313
if (time_after(jiffies, timeout))
@@ -327,18 +325,15 @@ static void w5100_write_macaddr(struct w5100_priv *priv)
327325

328326
for (i = 0; i < ETH_ALEN; i++)
329327
w5100_write(priv, W5100_SHAR + i, ndev->dev_addr[i]);
330-
mmiowb();
331328
}
332329

333330
static void w5100_hw_reset(struct w5100_priv *priv)
334331
{
335332
w5100_write_direct(priv, W5100_MR, MR_RST);
336-
mmiowb();
337333
mdelay(5);
338334
w5100_write_direct(priv, W5100_MR, priv->indirect ?
339335
MR_PB | MR_AI | MR_IND :
340336
MR_PB);
341-
mmiowb();
342337
w5100_write(priv, W5100_IMR, 0);
343338
w5100_write_macaddr(priv);
344339

@@ -347,23 +342,19 @@ static void w5100_hw_reset(struct w5100_priv *priv)
347342
*/
348343
w5100_write(priv, W5100_RMSR, 0x03);
349344
w5100_write(priv, W5100_TMSR, 0x03);
350-
mmiowb();
351345
}
352346

353347
static void w5100_hw_start(struct w5100_priv *priv)
354348
{
355349
w5100_write(priv, W5100_S0_MR, priv->promisc ?
356350
S0_MR_MACRAW : S0_MR_MACRAW_MF);
357-
mmiowb();
358351
w5100_command(priv, S0_CR_OPEN);
359352
w5100_write(priv, W5100_IMR, IR_S0);
360-
mmiowb();
361353
}
362354

363355
static void w5100_hw_close(struct w5100_priv *priv)
364356
{
365357
w5100_write(priv, W5100_IMR, 0);
366-
mmiowb();
367358
w5100_command(priv, S0_CR_CLOSE);
368359
}
369360

@@ -447,7 +438,6 @@ static int w5100_start_tx(struct sk_buff *skb, struct net_device *ndev)
447438
offset = w5100_read16(priv, W5100_S0_TX_WR);
448439
w5100_writebuf(priv, offset, skb->data, skb->len);
449440
w5100_write16(priv, W5100_S0_TX_WR, offset + skb->len);
450-
mmiowb();
451441
ndev->stats.tx_bytes += skb->len;
452442
ndev->stats.tx_packets++;
453443
dev_kfree_skb(skb);
@@ -488,7 +478,6 @@ static int w5100_napi_poll(struct napi_struct *napi, int budget)
488478
skb_put(skb, rx_len);
489479
w5100_readbuf(priv, offset + 2, skb->data, rx_len);
490480
w5100_write16(priv, W5100_S0_RX_RD, offset + 2 + rx_len);
491-
mmiowb();
492481
w5100_command(priv, S0_CR_RECV);
493482
skb->protocol = eth_type_trans(skb, ndev);
494483

@@ -500,7 +489,6 @@ static int w5100_napi_poll(struct napi_struct *napi, int budget)
500489
if (rx_count < budget) {
501490
napi_complete(napi);
502491
w5100_write(priv, W5100_IMR, IR_S0);
503-
mmiowb();
504492
}
505493

506494
return rx_count;
@@ -515,7 +503,6 @@ static irqreturn_t w5100_interrupt(int irq, void *ndev_instance)
515503
if (!ir)
516504
return IRQ_NONE;
517505
w5100_write(priv, W5100_S0_IR, ir);
518-
mmiowb();
519506

520507
if (ir & S0_IR_SENDOK) {
521508
netif_dbg(priv, tx_done, ndev, "tx done\n");
@@ -525,7 +512,6 @@ static irqreturn_t w5100_interrupt(int irq, void *ndev_instance)
525512
if (ir & S0_IR_RECV) {
526513
if (napi_schedule_prep(&priv->napi)) {
527514
w5100_write(priv, W5100_IMR, 0);
528-
mmiowb();
529515
__napi_schedule(&priv->napi);
530516
}
531517
}

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