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2 parents b502e6e + 452d622 commit e2e1a1cCopy full SHA for e2e1a1c
arch/arm64/kvm/hyp/nvhe/tlb.c
@@ -31,7 +31,14 @@ static void __tlb_switch_to_guest(struct kvm_s2_mmu *mmu,
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isb();
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}
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+ /*
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+ * __load_guest_stage2() includes an ISB only when the AT
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+ * workaround is applied. Take care of the opposite condition,
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+ * ensuring that we always have an ISB, but not two ISBs back
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+ * to back.
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+ */
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__load_guest_stage2(mmu);
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+ asm(ALTERNATIVE("isb", "nop", ARM64_WORKAROUND_SPECULATIVE_AT));
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static void __tlb_switch_to_host(struct tlb_inv_context *cxt)
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