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Chunyan Zhangbebarino
Chunyan Zhang
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bebarino
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clk: sprd: Add macros for referencing parents without strings
With the new clk parenting code, clk_init_data was expanded to include .parent_hws and .parent_data, for clk drivers to specify parents without name strings of clocks. Also some macros were added for using these two items to reference clock parents. Based on that to expand macros for sprd clocks: - SPRD_*_DATA, take an array of struct clk_parent_data * as its parents which should be a combination of .fw_name (devicetree clock-names), .hw (pointers to a local struct clk_hw). - SPRD_*_HW, take a local struct clk_hw pointer, instead of a string, as its parent. - SPRD_*_FW_NAME, take a string of clock-names decleared in the device tree as the clock parent. Signed-off-by: Chunyan Zhang <[email protected]> Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
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5 files changed

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lines changed

‎drivers/clk/sprd/composite.h

Lines changed: 28 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -18,26 +18,43 @@ struct sprd_comp {
1818
struct sprd_clk_common common;
1919
};
2020

21-
#define SPRD_COMP_CLK_TABLE(_struct, _name, _parent, _reg, _table, \
22-
_mshift, _mwidth, _dshift, _dwidth, _flags) \
21+
#define SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \
22+
_mshift, _mwidth, _dshift, _dwidth, \
23+
_flags, _fn) \
2324
struct sprd_comp _struct = { \
2425
.mux = _SPRD_MUX_CLK(_mshift, _mwidth, _table), \
2526
.div = _SPRD_DIV_CLK(_dshift, _dwidth), \
2627
.common = { \
2728
.regmap = NULL, \
2829
.reg = _reg, \
29-
.hw.init = CLK_HW_INIT_PARENTS(_name, \
30-
_parent, \
31-
&sprd_comp_ops, \
32-
_flags), \
30+
.hw.init = _fn(_name, _parent, \
31+
&sprd_comp_ops, _flags), \
3332
} \
3433
}
3534

36-
#define SPRD_COMP_CLK(_struct, _name, _parent, _reg, _mshift, \
37-
_mwidth, _dshift, _dwidth, _flags) \
38-
SPRD_COMP_CLK_TABLE(_struct, _name, _parent, _reg, \
39-
NULL, _mshift, _mwidth, \
40-
_dshift, _dwidth, _flags)
35+
#define SPRD_COMP_CLK_TABLE(_struct, _name, _parent, _reg, _table, \
36+
_mshift, _mwidth, _dshift, _dwidth, _flags) \
37+
SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \
38+
_mshift, _mwidth, _dshift, _dwidth, \
39+
_flags, CLK_HW_INIT_PARENTS)
40+
41+
#define SPRD_COMP_CLK(_struct, _name, _parent, _reg, _mshift, \
42+
_mwidth, _dshift, _dwidth, _flags) \
43+
SPRD_COMP_CLK_TABLE(_struct, _name, _parent, _reg, NULL, \
44+
_mshift, _mwidth, _dshift, _dwidth, _flags)
45+
46+
#define SPRD_COMP_CLK_DATA_TABLE(_struct, _name, _parent, _reg, _table, \
47+
_mshift, _mwidth, _dshift, \
48+
_dwidth, _flags) \
49+
SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \
50+
_mshift, _mwidth, _dshift, _dwidth, \
51+
_flags, CLK_HW_INIT_PARENTS_DATA)
52+
53+
#define SPRD_COMP_CLK_DATA(_struct, _name, _parent, _reg, _mshift, \
54+
_mwidth, _dshift, _dwidth, _flags) \
55+
SPRD_COMP_CLK_DATA_TABLE(_struct, _name, _parent, _reg, NULL, \
56+
_mshift, _mwidth, _dshift, _dwidth, \
57+
_flags)
4158

4259
static inline struct sprd_comp *hw_to_sprd_comp(const struct clk_hw *hw)
4360
{

‎drivers/clk/sprd/div.h

Lines changed: 14 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -35,20 +35,28 @@ struct sprd_div {
3535
struct sprd_clk_common common;
3636
};
3737

38-
#define SPRD_DIV_CLK(_struct, _name, _parent, _reg, \
39-
_shift, _width, _flags) \
38+
#define SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
39+
_shift, _width, _flags, _fn) \
4040
struct sprd_div _struct = { \
4141
.div = _SPRD_DIV_CLK(_shift, _width), \
4242
.common = { \
4343
.regmap = NULL, \
4444
.reg = _reg, \
45-
.hw.init = CLK_HW_INIT(_name, \
46-
_parent, \
47-
&sprd_div_ops, \
48-
_flags), \
45+
.hw.init = _fn(_name, _parent, \
46+
&sprd_div_ops, _flags), \
4947
} \
5048
}
5149

50+
#define SPRD_DIV_CLK(_struct, _name, _parent, _reg, \
51+
_shift, _width, _flags) \
52+
SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
53+
_shift, _width, _flags, CLK_HW_INIT)
54+
55+
#define SPRD_DIV_CLK_HW(_struct, _name, _parent, _reg, \
56+
_shift, _width, _flags) \
57+
SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
58+
_shift, _width, _flags, CLK_HW_INIT_HW)
59+
5260
static inline struct sprd_div *hw_to_sprd_div(const struct clk_hw *hw)
5361
{
5462
struct sprd_clk_common *common = hw_to_sprd_clk_common(hw);

‎drivers/clk/sprd/gate.h

Lines changed: 96 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -19,9 +19,9 @@ struct sprd_gate {
1919
struct sprd_clk_common common;
2020
};
2121

22-
#define SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \
22+
#define SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
2323
_sc_offset, _enable_mask, _flags, \
24-
_gate_flags, _udelay, _ops) \
24+
_gate_flags, _udelay, _ops, _fn) \
2525
struct sprd_gate _struct = { \
2626
.enable_mask = _enable_mask, \
2727
.sc_offset = _sc_offset, \
@@ -30,38 +30,121 @@ struct sprd_gate {
3030
.common = { \
3131
.regmap = NULL, \
3232
.reg = _reg, \
33-
.hw.init = CLK_HW_INIT(_name, \
34-
_parent, \
35-
_ops, \
36-
_flags), \
33+
.hw.init = _fn(_name, _parent, \
34+
_ops, _flags), \
3735
} \
3836
}
3937

38+
#define SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \
39+
_sc_offset, _enable_mask, _flags, \
40+
_gate_flags, _udelay, _ops) \
41+
SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
42+
_sc_offset, _enable_mask, _flags, \
43+
_gate_flags, _udelay, _ops, CLK_HW_INIT)
44+
4045
#define SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, _sc_offset, \
4146
_enable_mask, _flags, _gate_flags, _ops) \
4247
SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \
4348
_sc_offset, _enable_mask, _flags, \
4449
_gate_flags, 0, _ops)
4550

46-
#define SPRD_GATE_CLK(_struct, _name, _parent, _reg, \
47-
_enable_mask, _flags, _gate_flags) \
48-
SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, 0, \
49-
_enable_mask, _flags, _gate_flags, \
50-
&sprd_gate_ops)
51-
5251
#define SPRD_SC_GATE_CLK(_struct, _name, _parent, _reg, _sc_offset, \
5352
_enable_mask, _flags, _gate_flags) \
5453
SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, _sc_offset, \
5554
_enable_mask, _flags, _gate_flags, \
5655
&sprd_sc_gate_ops)
5756

57+
#define SPRD_GATE_CLK(_struct, _name, _parent, _reg, \
58+
_enable_mask, _flags, _gate_flags) \
59+
SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, 0, \
60+
_enable_mask, _flags, _gate_flags, \
61+
&sprd_gate_ops)
62+
5863
#define SPRD_PLL_SC_GATE_CLK(_struct, _name, _parent, _reg, _sc_offset, \
59-
_enable_mask, _flags, _gate_flags, _udelay) \
64+
_enable_mask, _flags, _gate_flags, \
65+
_udelay) \
6066
SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \
6167
_sc_offset, _enable_mask, _flags, \
6268
_gate_flags, _udelay, \
6369
&sprd_pll_sc_gate_ops)
6470

71+
72+
#define SPRD_SC_GATE_CLK_HW_OPS_UDELAY(_struct, _name, _parent, _reg, \
73+
_sc_offset, _enable_mask, \
74+
_flags, _gate_flags, \
75+
_udelay, _ops) \
76+
SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
77+
_sc_offset, _enable_mask, _flags, \
78+
_gate_flags, _udelay, _ops, \
79+
CLK_HW_INIT_HW)
80+
81+
#define SPRD_SC_GATE_CLK_HW_OPS(_struct, _name, _parent, _reg, \
82+
_sc_offset, _enable_mask, _flags, \
83+
_gate_flags, _ops) \
84+
SPRD_SC_GATE_CLK_HW_OPS_UDELAY(_struct, _name, _parent, _reg, \
85+
_sc_offset, _enable_mask, \
86+
_flags, _gate_flags, 0, _ops)
87+
88+
#define SPRD_SC_GATE_CLK_HW(_struct, _name, _parent, _reg, \
89+
_sc_offset, _enable_mask, _flags, \
90+
_gate_flags) \
91+
SPRD_SC_GATE_CLK_HW_OPS(_struct, _name, _parent, _reg, \
92+
_sc_offset, _enable_mask, _flags, \
93+
_gate_flags, &sprd_sc_gate_ops)
94+
95+
#define SPRD_GATE_CLK_HW(_struct, _name, _parent, _reg, \
96+
_enable_mask, _flags, _gate_flags) \
97+
SPRD_SC_GATE_CLK_HW_OPS(_struct, _name, _parent, _reg, 0, \
98+
_enable_mask, _flags, _gate_flags, \
99+
&sprd_gate_ops)
100+
101+
#define SPRD_PLL_SC_GATE_CLK_HW(_struct, _name, _parent, _reg, \
102+
_sc_offset, _enable_mask, _flags, \
103+
_gate_flags, _udelay) \
104+
SPRD_SC_GATE_CLK_HW_OPS_UDELAY(_struct, _name, _parent, _reg, \
105+
_sc_offset, _enable_mask, \
106+
_flags, _gate_flags, _udelay, \
107+
&sprd_pll_sc_gate_ops)
108+
109+
#define SPRD_SC_GATE_CLK_FW_NAME_OPS_UDELAY(_struct, _name, _parent, \
110+
_reg, _sc_offset, \
111+
_enable_mask, _flags, \
112+
_gate_flags, _udelay, _ops) \
113+
SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
114+
_sc_offset, _enable_mask, _flags, \
115+
_gate_flags, _udelay, _ops, \
116+
CLK_HW_INIT_FW_NAME)
117+
118+
#define SPRD_SC_GATE_CLK_FW_NAME_OPS(_struct, _name, _parent, _reg, \
119+
_sc_offset, _enable_mask, _flags, \
120+
_gate_flags, _ops) \
121+
SPRD_SC_GATE_CLK_FW_NAME_OPS_UDELAY(_struct, _name, _parent, \
122+
_reg, _sc_offset, \
123+
_enable_mask, _flags, \
124+
_gate_flags, 0, _ops)
125+
126+
#define SPRD_SC_GATE_CLK_FW_NAME(_struct, _name, _parent, _reg, \
127+
_sc_offset, _enable_mask, _flags, \
128+
_gate_flags) \
129+
SPRD_SC_GATE_CLK_FW_NAME_OPS(_struct, _name, _parent, _reg, \
130+
_sc_offset, _enable_mask, _flags, \
131+
_gate_flags, &sprd_sc_gate_ops)
132+
133+
#define SPRD_GATE_CLK_FW_NAME(_struct, _name, _parent, _reg, \
134+
_enable_mask, _flags, _gate_flags) \
135+
SPRD_SC_GATE_CLK_FW_NAME_OPS(_struct, _name, _parent, _reg, 0, \
136+
_enable_mask, _flags, _gate_flags, \
137+
&sprd_gate_ops)
138+
139+
#define SPRD_PLL_SC_GATE_CLK_FW_NAME(_struct, _name, _parent, _reg, \
140+
_sc_offset, _enable_mask, _flags, \
141+
_gate_flags, _udelay) \
142+
SPRD_SC_GATE_CLK_FW_NAME_OPS_UDELAY(_struct, _name, _parent, \
143+
_reg, _sc_offset, \
144+
_enable_mask, _flags, \
145+
_gate_flags, _udelay, \
146+
&sprd_pll_sc_gate_ops)
147+
65148
static inline struct sprd_gate *hw_to_sprd_gate(const struct clk_hw *hw)
66149
{
67150
struct sprd_clk_common *common = hw_to_sprd_clk_common(hw);

‎drivers/clk/sprd/mux.h

Lines changed: 21 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -36,26 +36,40 @@ struct sprd_mux {
3636
.table = _table, \
3737
}
3838

39-
#define SPRD_MUX_CLK_TABLE(_struct, _name, _parents, _table, \
40-
_reg, _shift, _width, \
41-
_flags) \
39+
#define SPRD_MUX_CLK_HW_INIT_FN(_struct, _name, _parents, _table, \
40+
_reg, _shift, _width, _flags, _fn) \
4241
struct sprd_mux _struct = { \
4342
.mux = _SPRD_MUX_CLK(_shift, _width, _table), \
4443
.common = { \
4544
.regmap = NULL, \
4645
.reg = _reg, \
47-
.hw.init = CLK_HW_INIT_PARENTS(_name, \
48-
_parents, \
49-
&sprd_mux_ops, \
50-
_flags), \
46+
.hw.init = _fn(_name, _parents, \
47+
&sprd_mux_ops, _flags), \
5148
} \
5249
}
5350

51+
#define SPRD_MUX_CLK_TABLE(_struct, _name, _parents, _table, \
52+
_reg, _shift, _width, _flags) \
53+
SPRD_MUX_CLK_HW_INIT_FN(_struct, _name, _parents, _table, \
54+
_reg, _shift, _width, _flags, \
55+
CLK_HW_INIT_PARENTS)
56+
5457
#define SPRD_MUX_CLK(_struct, _name, _parents, _reg, \
5558
_shift, _width, _flags) \
5659
SPRD_MUX_CLK_TABLE(_struct, _name, _parents, NULL, \
5760
_reg, _shift, _width, _flags)
5861

62+
#define SPRD_MUX_CLK_DATA_TABLE(_struct, _name, _parents, _table, \
63+
_reg, _shift, _width, _flags) \
64+
SPRD_MUX_CLK_HW_INIT_FN(_struct, _name, _parents, _table, \
65+
_reg, _shift, _width, _flags, \
66+
CLK_HW_INIT_PARENTS_DATA)
67+
68+
#define SPRD_MUX_CLK_DATA(_struct, _name, _parents, _reg, \
69+
_shift, _width, _flags) \
70+
SPRD_MUX_CLK_DATA_TABLE(_struct, _name, _parents, NULL, \
71+
_reg, _shift, _width, _flags)
72+
5973
static inline struct sprd_mux *hw_to_sprd_mux(const struct clk_hw *hw)
6074
{
6175
struct sprd_clk_common *common = hw_to_sprd_clk_common(hw);

‎drivers/clk/sprd/pll.h

Lines changed: 37 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -61,27 +61,33 @@ struct sprd_pll {
6161
struct sprd_clk_common common;
6262
};
6363

64+
#define SPRD_PLL_HW_INIT_FN(_struct, _name, _parent, _reg, \
65+
_regs_num, _itable, _factors, \
66+
_udelay, _k1, _k2, _fflag, \
67+
_fvco, _fn) \
68+
struct sprd_pll _struct = { \
69+
.regs_num = _regs_num, \
70+
.itable = _itable, \
71+
.factors = _factors, \
72+
.udelay = _udelay, \
73+
.k1 = _k1, \
74+
.k2 = _k2, \
75+
.fflag = _fflag, \
76+
.fvco = _fvco, \
77+
.common = { \
78+
.regmap = NULL, \
79+
.reg = _reg, \
80+
.hw.init = _fn(_name, _parent, \
81+
&sprd_pll_ops, 0),\
82+
}, \
83+
}
84+
6485
#define SPRD_PLL_WITH_ITABLE_K_FVCO(_struct, _name, _parent, _reg, \
6586
_regs_num, _itable, _factors, \
6687
_udelay, _k1, _k2, _fflag, _fvco) \
67-
struct sprd_pll _struct = { \
68-
.regs_num = _regs_num, \
69-
.itable = _itable, \
70-
.factors = _factors, \
71-
.udelay = _udelay, \
72-
.k1 = _k1, \
73-
.k2 = _k2, \
74-
.fflag = _fflag, \
75-
.fvco = _fvco, \
76-
.common = { \
77-
.regmap = NULL, \
78-
.reg = _reg, \
79-
.hw.init = CLK_HW_INIT(_name, \
80-
_parent, \
81-
&sprd_pll_ops, \
82-
0), \
83-
}, \
84-
}
88+
SPRD_PLL_HW_INIT_FN(_struct, _name, _parent, _reg, _regs_num, \
89+
_itable, _factors, _udelay, _k1, _k2, \
90+
_fflag, _fvco, CLK_HW_INIT)
8591

8692
#define SPRD_PLL_WITH_ITABLE_K(_struct, _name, _parent, _reg, \
8793
_regs_num, _itable, _factors, \
@@ -96,6 +102,19 @@ struct sprd_pll {
96102
_regs_num, _itable, _factors, \
97103
_udelay, 1000, 1000, 0, 0)
98104

105+
#define SPRD_PLL_FW_NAME(_struct, _name, _parent, _reg, _regs_num, \
106+
_itable, _factors, _udelay, _k1, _k2, \
107+
_fflag, _fvco) \
108+
SPRD_PLL_HW_INIT_FN(_struct, _name, _parent, _reg, _regs_num, \
109+
_itable, _factors, _udelay, _k1, _k2, \
110+
_fflag, _fvco, CLK_HW_INIT_FW_NAME)
111+
112+
#define SPRD_PLL_HW(_struct, _name, _parent, _reg, _regs_num, _itable, \
113+
_factors, _udelay, _k1, _k2, _fflag, _fvco) \
114+
SPRD_PLL_HW_INIT_FN(_struct, _name, _parent, _reg, _regs_num, \
115+
_itable, _factors, _udelay, _k1, _k2, \
116+
_fflag, _fvco, CLK_HW_INIT_HW)
117+
99118
static inline struct sprd_pll *hw_to_sprd_pll(struct clk_hw *hw)
100119
{
101120
struct sprd_clk_common *common = hw_to_sprd_clk_common(hw);

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