Skip to content

Commit f4956cf

Browse files
Peter ZijlstraKAGA-KOKO
authored andcommitted
x86/debug: Support negative polarity DR6 bits
DR6 has a whole bunch of bits that have negative polarity; they were architecturally reserved and defined to be 1 and are now getting used. Since they're 1 by default, 0 becomes the signal value. Handle this by xor'ing the read DR6 value by the reserved mask, this will flip them around such that 1 is the signal value (positive polarity). Current Linux doesn't yet support any of these bits, but there's two defined: - DR6[11] Bus Lock Debug Exception (ISEr39) - DR6[16] Restricted Transactional Memory (SDM) Update ptrace_{set,get}_debugreg() to provide/consume the value in architectural polarity. Although afaict ptrace_set_debugreg(6) is pointless, the value is not consumed anywhere. Change hw_breakpoint_restore() to alway write the DR6_RESERVED value to DR6, again, no consumer for that write. Suggested-by: Andrew Cooper <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Tested-by: Daniel Thompson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
1 parent 21d44be commit f4956cf

File tree

3 files changed

+5
-6
lines changed

3 files changed

+5
-6
lines changed

arch/x86/kernel/hw_breakpoint.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -464,7 +464,7 @@ void hw_breakpoint_restore(void)
464464
set_debugreg(__this_cpu_read(cpu_debugreg[1]), 1);
465465
set_debugreg(__this_cpu_read(cpu_debugreg[2]), 2);
466466
set_debugreg(__this_cpu_read(cpu_debugreg[3]), 3);
467-
set_debugreg(current->thread.debugreg6, 6);
467+
set_debugreg(DR6_RESERVED, 6);
468468
set_debugreg(__this_cpu_read(cpu_dr7), 7);
469469
}
470470
EXPORT_SYMBOL_GPL(hw_breakpoint_restore);

arch/x86/kernel/ptrace.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -601,7 +601,7 @@ static unsigned long ptrace_get_debugreg(struct task_struct *tsk, int n)
601601
if (bp)
602602
val = bp->hw.info.address;
603603
} else if (n == 6) {
604-
val = thread->debugreg6;
604+
val = thread->debugreg6 ^ DR6_RESERVED; /* Flip back to arch polarity */
605605
} else if (n == 7) {
606606
val = thread->ptrace_dr7;
607607
}
@@ -657,7 +657,7 @@ static int ptrace_set_debugreg(struct task_struct *tsk, int n,
657657
if (n < HBP_NUM) {
658658
rc = ptrace_set_breakpoint_addr(tsk, n, val);
659659
} else if (n == 6) {
660-
thread->debugreg6 = val;
660+
thread->debugreg6 = val ^ DR6_RESERVED; /* Flip to positive polarity */
661661
rc = 0;
662662
} else if (n == 7) {
663663
rc = ptrace_write_dr7(tsk, val);

arch/x86/kernel/traps.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -745,9 +745,8 @@ static __always_inline unsigned long debug_read_clear_dr6(void)
745745
* Keep it simple: clear DR6 immediately.
746746
*/
747747
get_debugreg(dr6, 6);
748-
set_debugreg(0, 6);
749-
/* Filter out all the reserved bits which are preset to 1 */
750-
dr6 &= ~DR6_RESERVED;
748+
set_debugreg(DR6_RESERVED, 6);
749+
dr6 ^= DR6_RESERVED; /* Flip to positive polarity */
751750

752751
/*
753752
* The SDM says "The processor clears the BTF flag when it

0 commit comments

Comments
 (0)