Skip to content

Commit 5022496

Browse files
fhahnSterling-Augustine
authored andcommitted
[VPlan] Manage FMFs for VPWidenCall via VPRecipeWithIRFlags. (NFC)
Update VPWidenCallRecipe to manage fast-math flags directly via VPRecipeWithIRFlags. This addresses a TODO and allows adjusting the FMFs directly on the recipe. Also fixes printing for flags for VPWidenCallRecipe.
1 parent 27084e6 commit 5022496

File tree

3 files changed

+10
-12
lines changed

3 files changed

+10
-12
lines changed

llvm/lib/Transforms/Vectorize/VPlan.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1609,7 +1609,7 @@ class VPScalarCastRecipe : public VPSingleDefRecipe {
16091609
};
16101610

16111611
/// A recipe for widening Call instructions.
1612-
class VPWidenCallRecipe : public VPSingleDefRecipe {
1612+
class VPWidenCallRecipe : public VPRecipeWithIRFlags {
16131613
/// ID of the vector intrinsic to call when widening the call. If set the
16141614
/// Intrinsic::not_intrinsic, a library call will be used instead.
16151615
Intrinsic::ID VectorIntrinsicID;
@@ -1624,7 +1624,8 @@ class VPWidenCallRecipe : public VPSingleDefRecipe {
16241624
VPWidenCallRecipe(Value *UV, iterator_range<IterT> CallArguments,
16251625
Intrinsic::ID VectorIntrinsicID, DebugLoc DL = {},
16261626
Function *Variant = nullptr)
1627-
: VPSingleDefRecipe(VPDef::VPWidenCallSC, CallArguments, UV, DL),
1627+
: VPRecipeWithIRFlags(VPDef::VPWidenCallSC, CallArguments,
1628+
*cast<Instruction>(UV)),
16281629
VectorIntrinsicID(VectorIntrinsicID), Variant(Variant) {
16291630
assert(
16301631
isa<Function>(getOperand(getNumOperands() - 1)->getLiveInIRValue()) &&

llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp

Lines changed: 5 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -935,8 +935,7 @@ void VPWidenCallRecipe::execute(VPTransformState &State) {
935935

936936
CallInst *V = State.Builder.CreateCall(VectorF, Args, OpBundles);
937937

938-
if (isa<FPMathOperator>(V))
939-
V->copyFastMathFlags(CI);
938+
setFlags(V);
940939

941940
if (!V->getType()->isVoidTy())
942941
State.set(this, V);
@@ -952,11 +951,6 @@ InstructionCost VPWidenCallRecipe::computeCost(ElementCount VF,
952951
CostKind);
953952
}
954953

955-
FastMathFlags FMF;
956-
// TODO: Manage flags via VPRecipeWithIRFlags.
957-
if (auto *FPMO = dyn_cast_or_null<FPMathOperator>(getUnderlyingValue()))
958-
FMF = FPMO->getFastMathFlags();
959-
960954
// Some backends analyze intrinsic arguments to determine cost. Use the
961955
// underlying value for the operand if it has one. Otherwise try to use the
962956
// operand of the underlying call instruction, if there is one. Otherwise
@@ -984,6 +978,7 @@ InstructionCost VPWidenCallRecipe::computeCost(ElementCount VF,
984978
ToVectorTy(Ctx.Types.inferScalarType(getOperand(I)), VF));
985979

986980
// TODO: Rework TTI interface to avoid reliance on underlying IntrinsicInst.
981+
FastMathFlags FMF = hasFastMathFlags() ? getFastMathFlags() : FastMathFlags();
987982
IntrinsicCostAttributes CostAttrs(
988983
VectorIntrinsicID, RetTy, Arguments, ParamTys, FMF,
989984
dyn_cast_or_null<IntrinsicInst>(getUnderlyingValue()));
@@ -1003,7 +998,9 @@ void VPWidenCallRecipe::print(raw_ostream &O, const Twine &Indent,
1003998
O << " = ";
1004999
}
10051000

1006-
O << "call @" << CalledFn->getName() << "(";
1001+
O << "call";
1002+
printFlags(O);
1003+
O << " @" << CalledFn->getName() << "(";
10071004
interleaveComma(arg_operands(), O, [&O, &SlotTracker](VPValue *Op) {
10081005
Op->printAsOperand(O, SlotTracker);
10091006
});

llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ target triple = "arm64-apple-ios"
2323
; CHECK-NEXT: vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%gep.src>
2424
; CHECK-NEXT: WIDEN ir<%l> = load vp<[[VEC_PTR]]>
2525
; CHECK-NEXT: WIDEN-CAST ir<%conv> = fpext ir<%l> to double
26-
; CHECK-NEXT: WIDEN-CALL ir<%s> = call @llvm.sin.f64(ir<%conv>) (using library function: __simd_sin_v2f64)
26+
; CHECK-NEXT: WIDEN-CALL ir<%s> = call reassoc nnan ninf nsz arcp contract afn @llvm.sin.f64(ir<%conv>) (using library function: __simd_sin_v2f64)
2727
; CHECK-NEXT: REPLICATE ir<%gep.dst> = getelementptr inbounds ir<%dst>, vp<[[STEPS]]>
2828
; CHECK-NEXT: REPLICATE store ir<%s>, ir<%gep.dst>
2929
; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
@@ -60,7 +60,7 @@ target triple = "arm64-apple-ios"
6060
; CHECK-NEXT: vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%gep.src>
6161
; CHECK-NEXT: WIDEN ir<%l> = load vp<[[VEC_PTR]]>
6262
; CHECK-NEXT: WIDEN-CAST ir<%conv> = fpext ir<%l> to double
63-
; CHECK-NEXT: WIDEN-CALL ir<%s> = call @llvm.sin.f64(ir<%conv>) (using vector intrinsic)
63+
; CHECK-NEXT: WIDEN-CALL ir<%s> = call reassoc nnan ninf nsz arcp contract afn @llvm.sin.f64(ir<%conv>) (using vector intrinsic)
6464
; CHECK-NEXT: REPLICATE ir<%gep.dst> = getelementptr inbounds ir<%dst>, vp<[[STEPS]]>
6565
; CHECK-NEXT: REPLICATE store ir<%s>, ir<%gep.dst>
6666
; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>

0 commit comments

Comments
 (0)