@@ -1397,8 +1397,7 @@ SILoadStoreOptimizer::mergeImagePair(CombineInfo &CI, CombineInfo &Paired,
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MachineInstr *New = MIB.addMemOperand (combineKnownAdjacentMMOs (CI, Paired));
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- unsigned SubRegIdx0, SubRegIdx1;
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- std::tie (SubRegIdx0, SubRegIdx1) = getSubRegIdxs (CI, Paired);
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+ auto [SubRegIdx0, SubRegIdx1] = getSubRegIdxs (CI, Paired);
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// Copy to the old destination registers.
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const MCInstrDesc &CopyDesc = TII->get (TargetOpcode::COPY);
@@ -1442,9 +1441,7 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeSMemLoadImmPair(
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New.addImm (MergedOffset);
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New.addImm (CI.CPol ).addMemOperand (combineKnownAdjacentMMOs (CI, Paired));
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- std::pair<unsigned , unsigned > SubRegIdx = getSubRegIdxs (CI, Paired);
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- const unsigned SubRegIdx0 = std::get<0 >(SubRegIdx);
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- const unsigned SubRegIdx1 = std::get<1 >(SubRegIdx);
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+ auto [SubRegIdx0, SubRegIdx1] = getSubRegIdxs (CI, Paired);
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// Copy to the old destination registers.
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const MCInstrDesc &CopyDesc = TII->get (TargetOpcode::COPY);
@@ -1497,9 +1494,7 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeBufferLoadPair(
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.addImm (0 ) // swz
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.addMemOperand (combineKnownAdjacentMMOs (CI, Paired));
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- std::pair<unsigned , unsigned > SubRegIdx = getSubRegIdxs (CI, Paired);
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- const unsigned SubRegIdx0 = std::get<0 >(SubRegIdx);
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- const unsigned SubRegIdx1 = std::get<1 >(SubRegIdx);
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+ auto [SubRegIdx0, SubRegIdx1] = getSubRegIdxs (CI, Paired);
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// Copy to the old destination registers.
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const MCInstrDesc &CopyDesc = TII->get (TargetOpcode::COPY);
@@ -1556,9 +1551,7 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeTBufferLoadPair(
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.addImm (0 ) // swz
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.addMemOperand (combineKnownAdjacentMMOs (CI, Paired));
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- std::pair<unsigned , unsigned > SubRegIdx = getSubRegIdxs (CI, Paired);
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- const unsigned SubRegIdx0 = std::get<0 >(SubRegIdx);
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- const unsigned SubRegIdx1 = std::get<1 >(SubRegIdx);
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+ auto [SubRegIdx0, SubRegIdx1] = getSubRegIdxs (CI, Paired);
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// Copy to the old destination registers.
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const MCInstrDesc &CopyDesc = TII->get (TargetOpcode::COPY);
@@ -1585,9 +1578,7 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeTBufferStorePair(
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const unsigned Opcode = getNewOpcode (CI, Paired);
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- std::pair<unsigned , unsigned > SubRegIdx = getSubRegIdxs (CI, Paired);
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- const unsigned SubRegIdx0 = std::get<0 >(SubRegIdx);
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- const unsigned SubRegIdx1 = std::get<1 >(SubRegIdx);
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+ auto [SubRegIdx0, SubRegIdx1] = getSubRegIdxs (CI, Paired);
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// Copy to the new source register.
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const TargetRegisterClass *SuperRC = getTargetRegisterClass (CI, Paired);
@@ -1654,9 +1645,7 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeFlatLoadPair(
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.addImm (CI.CPol )
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.addMemOperand (combineKnownAdjacentMMOs (CI, Paired));
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- std::pair<unsigned , unsigned > SubRegIdx = getSubRegIdxs (CI, Paired);
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- const unsigned SubRegIdx0 = std::get<0 >(SubRegIdx);
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- const unsigned SubRegIdx1 = std::get<1 >(SubRegIdx);
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+ auto [SubRegIdx0, SubRegIdx1] = getSubRegIdxs (CI, Paired);
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// Copy to the old destination registers.
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const MCInstrDesc &CopyDesc = TII->get (TargetOpcode::COPY);
@@ -1683,9 +1672,7 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeFlatStorePair(
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const unsigned Opcode = getNewOpcode (CI, Paired);
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- std::pair<unsigned , unsigned > SubRegIdx = getSubRegIdxs (CI, Paired);
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- const unsigned SubRegIdx0 = std::get<0 >(SubRegIdx);
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- const unsigned SubRegIdx1 = std::get<1 >(SubRegIdx);
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+ auto [SubRegIdx0, SubRegIdx1] = getSubRegIdxs (CI, Paired);
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// Copy to the new source register.
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const TargetRegisterClass *SuperRC = getTargetRegisterClass (CI, Paired);
@@ -1876,7 +1863,7 @@ SILoadStoreOptimizer::getSubRegIdxs(const CombineInfo &CI,
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Idx1 = Idxs[CI.Width ][Paired.Width - 1 ];
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}
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- return std::pair ( Idx0, Idx1) ;
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+ return { Idx0, Idx1} ;
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}
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const TargetRegisterClass *
@@ -1914,9 +1901,7 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeBufferStorePair(
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const unsigned Opcode = getNewOpcode (CI, Paired);
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- std::pair<unsigned , unsigned > SubRegIdx = getSubRegIdxs (CI, Paired);
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- const unsigned SubRegIdx0 = std::get<0 >(SubRegIdx);
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- const unsigned SubRegIdx1 = std::get<1 >(SubRegIdx);
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+ auto [SubRegIdx0, SubRegIdx1] = getSubRegIdxs (CI, Paired);
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// Copy to the new source register.
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const TargetRegisterClass *SuperRC = getTargetRegisterClass (CI, Paired);
@@ -2225,7 +2210,7 @@ bool SILoadStoreOptimizer::promoteConstantOffsetToImm(
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MAddrNext.Base .HiSubReg != MAddr.Base .HiSubReg )
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continue ;
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- InstsWCommonBase.push_back ( std::pair ( &MINext, MAddrNext.Offset ) );
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+ InstsWCommonBase.emplace_back ( &MINext, MAddrNext.Offset );
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int64_t Dist = MAddr.Offset - MAddrNext.Offset ;
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TargetLoweringBase::AddrMode AM;
@@ -2252,16 +2237,16 @@ bool SILoadStoreOptimizer::promoteConstantOffsetToImm(
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updateBaseAndOffset (MI, Base, MAddr.Offset - AnchorAddr.Offset );
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LLVM_DEBUG (dbgs () << " After promotion: " ; MI.dump (););
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- for (auto P : InstsWCommonBase) {
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+ for (auto [OtherMI, OtherOffset] : InstsWCommonBase) {
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TargetLoweringBase::AddrMode AM;
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AM.HasBaseReg = true ;
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- AM.BaseOffs = P. second - AnchorAddr.Offset ;
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+ AM.BaseOffs = OtherOffset - AnchorAddr.Offset ;
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if (TLI->isLegalGlobalAddressingMode (AM)) {
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- LLVM_DEBUG (dbgs () << " Promote Offset(" << P. second ;
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- dbgs () << " ) " ; P. first ->dump ());
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- updateBaseAndOffset (*P. first , Base, P. second - AnchorAddr.Offset );
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- LLVM_DEBUG (dbgs () << " After promotion: " ; P. first ->dump ());
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+ LLVM_DEBUG (dbgs () << " Promote Offset(" << OtherOffset; dbgs () << " ) " ;
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+ OtherMI ->dump ());
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+ updateBaseAndOffset (*OtherMI , Base, OtherOffset - AnchorAddr.Offset );
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+ LLVM_DEBUG (dbgs () << " After promotion: " ; OtherMI ->dump ());
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}
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}
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AnchorList.insert (AnchorInst);
@@ -2375,7 +2360,7 @@ SILoadStoreOptimizer::collectMergeableInsts(
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++I;
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}
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- return std::pair ( BlockI, Modified) ;
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+ return { BlockI, Modified} ;
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}
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// Scan through looking for adjacent LDS operations with constant offsets from
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