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[AMDGPU] Modernize some syntax in SILoadStoreOptimizer. NFC.
Use structured bindings and similar.
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+17
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+17
-32
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llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp

Lines changed: 17 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -1397,8 +1397,7 @@ SILoadStoreOptimizer::mergeImagePair(CombineInfo &CI, CombineInfo &Paired,
13971397

13981398
MachineInstr *New = MIB.addMemOperand(combineKnownAdjacentMMOs(CI, Paired));
13991399

1400-
unsigned SubRegIdx0, SubRegIdx1;
1401-
std::tie(SubRegIdx0, SubRegIdx1) = getSubRegIdxs(CI, Paired);
1400+
auto [SubRegIdx0, SubRegIdx1] = getSubRegIdxs(CI, Paired);
14021401

14031402
// Copy to the old destination registers.
14041403
const MCInstrDesc &CopyDesc = TII->get(TargetOpcode::COPY);
@@ -1442,9 +1441,7 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeSMemLoadImmPair(
14421441
New.addImm(MergedOffset);
14431442
New.addImm(CI.CPol).addMemOperand(combineKnownAdjacentMMOs(CI, Paired));
14441443

1445-
std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired);
1446-
const unsigned SubRegIdx0 = std::get<0>(SubRegIdx);
1447-
const unsigned SubRegIdx1 = std::get<1>(SubRegIdx);
1444+
auto [SubRegIdx0, SubRegIdx1] = getSubRegIdxs(CI, Paired);
14481445

14491446
// Copy to the old destination registers.
14501447
const MCInstrDesc &CopyDesc = TII->get(TargetOpcode::COPY);
@@ -1497,9 +1494,7 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeBufferLoadPair(
14971494
.addImm(0) // swz
14981495
.addMemOperand(combineKnownAdjacentMMOs(CI, Paired));
14991496

1500-
std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired);
1501-
const unsigned SubRegIdx0 = std::get<0>(SubRegIdx);
1502-
const unsigned SubRegIdx1 = std::get<1>(SubRegIdx);
1497+
auto [SubRegIdx0, SubRegIdx1] = getSubRegIdxs(CI, Paired);
15031498

15041499
// Copy to the old destination registers.
15051500
const MCInstrDesc &CopyDesc = TII->get(TargetOpcode::COPY);
@@ -1556,9 +1551,7 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeTBufferLoadPair(
15561551
.addImm(0) // swz
15571552
.addMemOperand(combineKnownAdjacentMMOs(CI, Paired));
15581553

1559-
std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired);
1560-
const unsigned SubRegIdx0 = std::get<0>(SubRegIdx);
1561-
const unsigned SubRegIdx1 = std::get<1>(SubRegIdx);
1554+
auto [SubRegIdx0, SubRegIdx1] = getSubRegIdxs(CI, Paired);
15621555

15631556
// Copy to the old destination registers.
15641557
const MCInstrDesc &CopyDesc = TII->get(TargetOpcode::COPY);
@@ -1585,9 +1578,7 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeTBufferStorePair(
15851578

15861579
const unsigned Opcode = getNewOpcode(CI, Paired);
15871580

1588-
std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired);
1589-
const unsigned SubRegIdx0 = std::get<0>(SubRegIdx);
1590-
const unsigned SubRegIdx1 = std::get<1>(SubRegIdx);
1581+
auto [SubRegIdx0, SubRegIdx1] = getSubRegIdxs(CI, Paired);
15911582

15921583
// Copy to the new source register.
15931584
const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired);
@@ -1654,9 +1645,7 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeFlatLoadPair(
16541645
.addImm(CI.CPol)
16551646
.addMemOperand(combineKnownAdjacentMMOs(CI, Paired));
16561647

1657-
std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired);
1658-
const unsigned SubRegIdx0 = std::get<0>(SubRegIdx);
1659-
const unsigned SubRegIdx1 = std::get<1>(SubRegIdx);
1648+
auto [SubRegIdx0, SubRegIdx1] = getSubRegIdxs(CI, Paired);
16601649

16611650
// Copy to the old destination registers.
16621651
const MCInstrDesc &CopyDesc = TII->get(TargetOpcode::COPY);
@@ -1683,9 +1672,7 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeFlatStorePair(
16831672

16841673
const unsigned Opcode = getNewOpcode(CI, Paired);
16851674

1686-
std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired);
1687-
const unsigned SubRegIdx0 = std::get<0>(SubRegIdx);
1688-
const unsigned SubRegIdx1 = std::get<1>(SubRegIdx);
1675+
auto [SubRegIdx0, SubRegIdx1] = getSubRegIdxs(CI, Paired);
16891676

16901677
// Copy to the new source register.
16911678
const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired);
@@ -1876,7 +1863,7 @@ SILoadStoreOptimizer::getSubRegIdxs(const CombineInfo &CI,
18761863
Idx1 = Idxs[CI.Width][Paired.Width - 1];
18771864
}
18781865

1879-
return std::pair(Idx0, Idx1);
1866+
return {Idx0, Idx1};
18801867
}
18811868

18821869
const TargetRegisterClass *
@@ -1914,9 +1901,7 @@ MachineBasicBlock::iterator SILoadStoreOptimizer::mergeBufferStorePair(
19141901

19151902
const unsigned Opcode = getNewOpcode(CI, Paired);
19161903

1917-
std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired);
1918-
const unsigned SubRegIdx0 = std::get<0>(SubRegIdx);
1919-
const unsigned SubRegIdx1 = std::get<1>(SubRegIdx);
1904+
auto [SubRegIdx0, SubRegIdx1] = getSubRegIdxs(CI, Paired);
19201905

19211906
// Copy to the new source register.
19221907
const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired);
@@ -2225,7 +2210,7 @@ bool SILoadStoreOptimizer::promoteConstantOffsetToImm(
22252210
MAddrNext.Base.HiSubReg != MAddr.Base.HiSubReg)
22262211
continue;
22272212

2228-
InstsWCommonBase.push_back(std::pair(&MINext, MAddrNext.Offset));
2213+
InstsWCommonBase.emplace_back(&MINext, MAddrNext.Offset);
22292214

22302215
int64_t Dist = MAddr.Offset - MAddrNext.Offset;
22312216
TargetLoweringBase::AddrMode AM;
@@ -2252,16 +2237,16 @@ bool SILoadStoreOptimizer::promoteConstantOffsetToImm(
22522237
updateBaseAndOffset(MI, Base, MAddr.Offset - AnchorAddr.Offset);
22532238
LLVM_DEBUG(dbgs() << " After promotion: "; MI.dump(););
22542239

2255-
for (auto P : InstsWCommonBase) {
2240+
for (auto [OtherMI, OtherOffset] : InstsWCommonBase) {
22562241
TargetLoweringBase::AddrMode AM;
22572242
AM.HasBaseReg = true;
2258-
AM.BaseOffs = P.second - AnchorAddr.Offset;
2243+
AM.BaseOffs = OtherOffset - AnchorAddr.Offset;
22592244

22602245
if (TLI->isLegalGlobalAddressingMode(AM)) {
2261-
LLVM_DEBUG(dbgs() << " Promote Offset(" << P.second;
2262-
dbgs() << ")"; P.first->dump());
2263-
updateBaseAndOffset(*P.first, Base, P.second - AnchorAddr.Offset);
2264-
LLVM_DEBUG(dbgs() << " After promotion: "; P.first->dump());
2246+
LLVM_DEBUG(dbgs() << " Promote Offset(" << OtherOffset; dbgs() << ")";
2247+
OtherMI->dump());
2248+
updateBaseAndOffset(*OtherMI, Base, OtherOffset - AnchorAddr.Offset);
2249+
LLVM_DEBUG(dbgs() << " After promotion: "; OtherMI->dump());
22652250
}
22662251
}
22672252
AnchorList.insert(AnchorInst);
@@ -2375,7 +2360,7 @@ SILoadStoreOptimizer::collectMergeableInsts(
23752360
++I;
23762361
}
23772362

2378-
return std::pair(BlockI, Modified);
2363+
return {BlockI, Modified};
23792364
}
23802365

23812366
// Scan through looking for adjacent LDS operations with constant offsets from

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