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AaronBallmanaaryanshukla
AaronBallman
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aaryanshukla
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Finish deleting the le32/le64 targets (llvm#98497)
This is a revert of ef5e7f9 which was a temporary partial revert of 77ac823. The le32 and le64 targets are no longer necessary to retain, so this removes them entirely.
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18 files changed

+4
-157
lines changed

18 files changed

+4
-157
lines changed

‎clang/docs/ReleaseNotes.rst

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@@ -40,6 +40,8 @@ code bases.
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- Setting the deprecated CMake variable ``GCC_INSTALL_PREFIX`` (which sets the
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default ``--gcc-toolchain=``) now leads to a fatal error.
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43+
- The ``le32`` and ``le64`` targets have been removed.
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C/C++ Language Potentially Breaking Changes
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-------------------------------------------
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‎clang/docs/tools/clang-formatted-files.txt

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@@ -362,7 +362,6 @@ clang/lib/Basic/Targets/BPF.cpp
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clang/lib/Basic/Targets/BPF.h
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clang/lib/Basic/Targets/Hexagon.h
364364
clang/lib/Basic/Targets/Lanai.h
365-
clang/lib/Basic/Targets/Le64.h
366365
clang/lib/Basic/Targets/M68k.h
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clang/lib/Basic/Targets/MSP430.h
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clang/lib/Basic/Targets/NVPTX.cpp

‎clang/lib/Basic/CMakeLists.txt

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@@ -102,7 +102,6 @@ add_clang_library(clangBasic
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Targets/DirectX.cpp
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Targets/Hexagon.cpp
104104
Targets/Lanai.cpp
105-
Targets/Le64.cpp
106105
Targets/LoongArch.cpp
107106
Targets/M68k.cpp
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Targets/MSP430.cpp

‎clang/lib/Basic/Targets.cpp

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@@ -23,7 +23,6 @@
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#include "Targets/DirectX.h"
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#include "Targets/Hexagon.h"
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#include "Targets/Lanai.h"
26-
#include "Targets/Le64.h"
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#include "Targets/LoongArch.h"
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#include "Targets/M68k.h"
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#include "Targets/MSP430.h"
@@ -344,17 +343,6 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
344343
return std::make_unique<M68kTargetInfo>(Triple, Opts);
345344
}
346345

347-
case llvm::Triple::le32:
348-
switch (os) {
349-
case llvm::Triple::NaCl:
350-
return std::make_unique<NaClTargetInfo<PNaClTargetInfo>>(Triple, Opts);
351-
default:
352-
return nullptr;
353-
}
354-
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case llvm::Triple::le64:
356-
return std::make_unique<Le64TargetInfo>(Triple, Opts);
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case llvm::Triple::ppc:
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switch (os) {
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case llvm::Triple::Linux:

‎clang/lib/Basic/Targets/Le64.cpp

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This file was deleted.

‎clang/lib/Basic/Targets/Le64.h

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This file was deleted.

‎clang/lib/Basic/Targets/OSTargets.h

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@@ -841,9 +841,6 @@ class LLVM_LIBRARY_VISIBILITY NaClTargetInfo : public OSTargetInfo<Target> {
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"i64:64-i128:128-n8:16:32:64-S128");
842842
} else if (Triple.getArch() == llvm::Triple::mipsel) {
843843
// Handled on mips' setDataLayout.
844-
} else {
845-
assert(Triple.getArch() == llvm::Triple::le32);
846-
this->resetDataLayout("e-p:32:32-i64:64");
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}
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}
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};

‎clang/lib/CodeGen/CodeGenModule.cpp

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@@ -116,8 +116,6 @@ createTargetCodeGenInfo(CodeGenModule &CGM) {
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default:
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return createDefaultTargetCodeGenInfo(CGM);
118118

119-
case llvm::Triple::le32:
120-
return createPNaClTargetCodeGenInfo(CGM);
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case llvm::Triple::m68k:
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return createM68kTargetCodeGenInfo(CGM);
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case llvm::Triple::mips:

‎clang/lib/CodeGen/ItaniumCXXABI.cpp

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@@ -576,13 +576,6 @@ CodeGen::CGCXXABI *CodeGen::CreateItaniumCXXABI(CodeGenModule &CGM) {
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return new XLCXXABI(CGM);
577577

578578
case TargetCXXABI::GenericItanium:
579-
if (CGM.getContext().getTargetInfo().getTriple().getArch()
580-
== llvm::Triple::le32) {
581-
// For PNaCl, use ARM-style method pointers so that PNaCl code
582-
// does not assume anything about the alignment of function
583-
// pointers.
584-
return new ItaniumCXXABI(CGM, /*UseARMMethodPtrABI=*/true);
585-
}
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return new ItaniumCXXABI(CGM);
587580

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case TargetCXXABI::Microsoft:

‎clang/lib/Driver/ToolChains/Clang.cpp

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@@ -3815,12 +3815,6 @@ static void RenderBuiltinOptions(const ToolChain &TC, const llvm::Triple &T,
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if (UseBuiltins)
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A->render(Args, CmdArgs);
38173817
}
3818-
3819-
// le32-specific flags:
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// -fno-math-builtin: clang should not convert math builtins to intrinsics
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// by default.
3822-
if (TC.getArch() == llvm::Triple::le32)
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CmdArgs.push_back("-fno-math-builtin");
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}
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bool Driver::getDefaultModuleCachePath(SmallVectorImpl<char> &Result) {

‎clang/test/CodeGen/bitfield-access-pad.c

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@@ -16,7 +16,6 @@
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// Configs that have expensive unaligned access
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// Little Endian
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// RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s
19-
// RUN: %clang_cc1 -triple=le64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s
2019

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// Big endian
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// RUN: %clang_cc1 -triple=m68k-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s

‎clang/test/CodeGen/bitfield-access-unit.c

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@@ -53,8 +53,8 @@
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// RUN: %clang_cc1 -triple=sparc-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT-STRICT %s
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// RUN: %clang_cc1 -triple=tce-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT-STRICT %s
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56-
// Both le64-elf and m68-elf are strict alignment ISAs with 4-byte aligned
57-
// 64-bit or 2-byte aligned 32-bit integer types. This more compex to describe here.
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// m68-elf is a strict alignment ISA with 4-byte aligned 64-bit or 2-byte
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// aligned 32-bit integer types. This more compex to describe here.
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// If unaligned access is expensive don't stick these together.
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struct A {

‎clang/test/CodeGenCXX/bitfield-access-empty.cpp

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@@ -26,7 +26,6 @@
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// RUN: %clang_cc1 -triple=bpf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
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// RUN: %clang_cc1 -triple=csky %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
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// RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
29-
// RUN: %clang_cc1 -triple=le64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
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// RUN: %clang_cc1 -triple=loongarch32-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
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// RUN: %clang_cc1 -triple=nvptx-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
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// RUN: %clang_cc1 -triple=riscv32 %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s

‎clang/test/CodeGenCXX/bitfield-access-tail.cpp

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@@ -26,7 +26,6 @@
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// RUN: %clang_cc1 -triple=bpf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
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// RUN: %clang_cc1 -triple=csky %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
2828
// RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
29-
// RUN: %clang_cc1 -triple=le64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
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// RUN: %clang_cc1 -triple=loongarch32-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
3130
// RUN: %clang_cc1 -triple=nvptx-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
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// RUN: %clang_cc1 -triple=riscv32 %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s

‎clang/test/Preprocessor/predefined-macros-no-warnings.c

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@@ -75,8 +75,6 @@
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// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple m68k
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// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple m68k-linux
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// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple m68k-netbsd
78-
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple le32-nacl
79-
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple le64
8078
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple ppc
8179
// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple ppc-freebsd
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// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple ppc-netbsd

‎llvm/include/llvm/TargetParser/Triple.h

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@@ -88,8 +88,6 @@ class Triple {
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xtensa, // Tensilica: Xtensa
8989
nvptx, // NVPTX: 32-bit
9090
nvptx64, // NVPTX: 64-bit
91-
le32, // le32: generic little-endian 32-bit CPU (PNaCl)
92-
le64, // le64: generic little-endian 64-bit CPU (PNaCl)
9391
amdil, // AMDIL
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amdil64, // AMDIL with 64-bit pointers
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hsail, // AMD HSAIL

‎llvm/lib/TargetParser/Triple.cpp

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@@ -44,8 +44,6 @@ StringRef Triple::getArchTypeName(ArchType Kind) {
4444
case hsail: return "hsail";
4545
case kalimba: return "kalimba";
4646
case lanai: return "lanai";
47-
case le32: return "le32";
48-
case le64: return "le64";
4947
case loongarch32: return "loongarch32";
5048
case loongarch64: return "loongarch64";
5149
case m68k: return "m68k";
@@ -199,9 +197,6 @@ StringRef Triple::getArchTypePrefix(ArchType Kind) {
199197
case nvptx: return "nvvm";
200198
case nvptx64: return "nvvm";
201199

202-
case le32: return "le32";
203-
case le64: return "le64";
204-
205200
case amdil:
206201
case amdil64: return "amdil";
207202

@@ -432,8 +427,6 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
432427
.Case("xcore", xcore)
433428
.Case("nvptx", nvptx)
434429
.Case("nvptx64", nvptx64)
435-
.Case("le32", le32)
436-
.Case("le64", le64)
437430
.Case("amdil", amdil)
438431
.Case("amdil64", amdil64)
439432
.Case("hsail", hsail)
@@ -574,8 +567,6 @@ static Triple::ArchType parseArch(StringRef ArchName) {
574567
.Case("xcore", Triple::xcore)
575568
.Case("nvptx", Triple::nvptx)
576569
.Case("nvptx64", Triple::nvptx64)
577-
.Case("le32", Triple::le32)
578-
.Case("le64", Triple::le64)
579570
.Case("amdil", Triple::amdil)
580571
.Case("amdil64", Triple::amdil64)
581572
.Case("hsail", Triple::hsail)
@@ -905,8 +896,6 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
905896
case Triple::hsail:
906897
case Triple::kalimba:
907898
case Triple::lanai:
908-
case Triple::le32:
909-
case Triple::le64:
910899
case Triple::loongarch32:
911900
case Triple::loongarch64:
912901
case Triple::m68k:
@@ -1603,7 +1592,6 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
16031592
case llvm::Triple::hsail:
16041593
case llvm::Triple::kalimba:
16051594
case llvm::Triple::lanai:
1606-
case llvm::Triple::le32:
16071595
case llvm::Triple::loongarch32:
16081596
case llvm::Triple::m68k:
16091597
case llvm::Triple::mips:
@@ -1636,7 +1624,6 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
16361624
case llvm::Triple::bpfeb:
16371625
case llvm::Triple::bpfel:
16381626
case llvm::Triple::hsail64:
1639-
case llvm::Triple::le64:
16401627
case llvm::Triple::loongarch64:
16411628
case llvm::Triple::mips64:
16421629
case llvm::Triple::mips64el:
@@ -1695,7 +1682,6 @@ Triple Triple::get32BitArchVariant() const {
16951682
case Triple::hsail:
16961683
case Triple::kalimba:
16971684
case Triple::lanai:
1698-
case Triple::le32:
16991685
case Triple::loongarch32:
17001686
case Triple::m68k:
17011687
case Triple::mips:
@@ -1726,7 +1712,6 @@ Triple Triple::get32BitArchVariant() const {
17261712
case Triple::aarch64_be: T.setArch(Triple::armeb); break;
17271713
case Triple::amdil64: T.setArch(Triple::amdil); break;
17281714
case Triple::hsail64: T.setArch(Triple::hsail); break;
1729-
case Triple::le64: T.setArch(Triple::le32); break;
17301715
case Triple::loongarch64: T.setArch(Triple::loongarch32); break;
17311716
case Triple::mips64:
17321717
T.setArch(Triple::mips, getSubArch());
@@ -1781,7 +1766,6 @@ Triple Triple::get64BitArchVariant() const {
17811766
case Triple::bpfeb:
17821767
case Triple::bpfel:
17831768
case Triple::hsail64:
1784-
case Triple::le64:
17851769
case Triple::loongarch64:
17861770
case Triple::mips64:
17871771
case Triple::mips64el:
@@ -1805,7 +1789,6 @@ Triple Triple::get64BitArchVariant() const {
18051789
case Triple::arm: T.setArch(Triple::aarch64); break;
18061790
case Triple::armeb: T.setArch(Triple::aarch64_be); break;
18071791
case Triple::hsail: T.setArch(Triple::hsail64); break;
1808-
case Triple::le32: T.setArch(Triple::le64); break;
18091792
case Triple::loongarch32: T.setArch(Triple::loongarch64); break;
18101793
case Triple::mips:
18111794
T.setArch(Triple::mips64, getSubArch());
@@ -1848,8 +1831,6 @@ Triple Triple::getBigEndianArchVariant() const {
18481831
case Triple::hsail64:
18491832
case Triple::hsail:
18501833
case Triple::kalimba:
1851-
case Triple::le32:
1852-
case Triple::le64:
18531834
case Triple::loongarch32:
18541835
case Triple::loongarch64:
18551836
case Triple::msp430:
@@ -1953,8 +1934,6 @@ bool Triple::isLittleEndian() const {
19531934
case Triple::hsail64:
19541935
case Triple::hsail:
19551936
case Triple::kalimba:
1956-
case Triple::le32:
1957-
case Triple::le64:
19581937
case Triple::loongarch32:
19591938
case Triple::loongarch64:
19601939
case Triple::mips64el:

‎llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn

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Original file line numberDiff line numberDiff line change
@@ -108,7 +108,6 @@ static_library("Basic") {
108108
"Targets/DirectX.cpp",
109109
"Targets/Hexagon.cpp",
110110
"Targets/Lanai.cpp",
111-
"Targets/Le64.cpp",
112111
"Targets/LoongArch.cpp",
113112
"Targets/M68k.cpp",
114113
"Targets/MSP430.cpp",

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