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Merge pull request #27 from tannewt/sideset_enable
Add sideset assembly support.
2 parents 06c08f5 + dd2f65e commit d43cdd0

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3 files changed

+69
-3
lines changed

3 files changed

+69
-3
lines changed

adafruit_pioasm.py

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,7 @@ def assemble(text_program):
3838
labels = {}
3939
instructions = []
4040
sideset_count = 0
41+
sideset_enable = 0
4142
for line in text_program.split("\n"):
4243
line = line.strip()
4344
if not line:
@@ -55,6 +56,7 @@ def assemble(text_program):
5556
pass
5657
elif line.startswith(".side_set"):
5758
sideset_count = int(line.split()[1])
59+
sideset_enable = 1 if "opt" in line else 0
5860
elif line.endswith(":"):
5961
label = line[:-1]
6062
if label in labels:
@@ -64,7 +66,7 @@ def assemble(text_program):
6466
# Only add as an instruction if the line isn't empty
6567
instructions.append(line)
6668

67-
max_delay = 2 ** (5 - sideset_count) - 1
69+
max_delay = 2 ** (5 - sideset_count - sideset_enable) - 1
6870
assembled = []
6971
for instruction in instructions:
7072
# print(instruction)
@@ -76,10 +78,13 @@ def assemble(text_program):
7678
raise RuntimeError("Delay too long:", delay)
7779
instruction.pop()
7880
if len(instruction) > 1 and instruction[-2] == "side":
81+
if sideset_count == 0:
82+
raise RuntimeError("No side_set count set")
7983
sideset_value = int(instruction[-1])
8084
if sideset_value > 2 ** sideset_count:
8185
raise RuntimeError("Sideset value too large")
82-
delay |= sideset_value << (5 - sideset_count)
86+
delay |= sideset_value << (5 - sideset_count - sideset_enable)
87+
delay |= sideset_enable << 4
8388
instruction.pop()
8489
instruction.pop()
8590

@@ -186,6 +191,6 @@ def assemble(text_program):
186191
else:
187192
raise RuntimeError("Unknown instruction:" + instruction[0])
188193
assembled[-1] |= delay << 8
189-
# print(hex(assembled[-1]))
194+
# print(bin(assembled[-1]))
190195

191196
return array.array("H", assembled)

examples/txuart.py

Lines changed: 53 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,53 @@
1+
# SPDX-FileCopyrightText: 2021 Jeff Epler, written for Adafruit Industries
2+
#
3+
# SPDX-License-Identifier: MIT
4+
5+
import rp2pio
6+
import adafruit_pioasm
7+
8+
code = adafruit_pioasm.assemble(
9+
"""
10+
.program uart_tx
11+
.side_set 1 opt
12+
13+
; An 8n1 UART transmit program.
14+
; OUT pin 0 and side-set pin 0 are both mapped to UART TX pin.
15+
16+
pull side 1 [7] ; Assert stop bit, or stall with line in idle state
17+
set x, 7 side 0 [7] ; Preload bit counter, assert start bit for 8 clocks
18+
bitloop: ; This loop will run 8 times (8n1 UART)
19+
out pins, 1 ; Shift 1 bit from OSR to the first OUT pin
20+
jmp x-- bitloop [6] ; Each loop iteration is 8 cycles.
21+
22+
"""
23+
)
24+
25+
26+
class TXUART:
27+
def __init__(self, *, tx, baudrate=9600):
28+
self.pio = rp2pio.StateMachine(
29+
code,
30+
first_out_pin=tx,
31+
first_sideset_pin=tx,
32+
frequency=8 * baudrate,
33+
initial_sideset_pin_state=1,
34+
initial_sideset_pin_direction=1,
35+
initial_out_pin_state=1,
36+
initial_out_pin_direction=1,
37+
sideset_enable=True,
38+
)
39+
40+
@property
41+
def timeout(self):
42+
return 0
43+
44+
@property
45+
def baudrate(self):
46+
return self.pio.frequency // 8
47+
48+
@baudrate.setter
49+
def baudrate(self, frequency):
50+
self.pio.frequency = frequency * 8
51+
52+
def write(self, buf):
53+
return self.pio.write(buf)

tests/testpioasm.py

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,14 @@ def testNop(self):
4444
self.assertAssemblesTo(".side_set 1\nnop side 1", [0b101_10000_010_00_010])
4545
self.assertAssemblesTo(".side_set 1\nnop side 1 [1]", [0b101_10001_010_00_010])
4646

47+
def testSidesetOpt(self):
48+
self.assertAssemblesTo(".side_set 1 opt\nnop side 1", [0b101_11000_010_00_010])
49+
self.assertAssemblesTo(".side_set 1 opt\nnop side 0", [0b101_10000_010_00_010])
50+
self.assertAssemblesTo(
51+
".side_set 1 opt\nnop side 0 [1]", [0b101_10001_010_00_010]
52+
)
53+
self.assertAssemblesTo(".side_set 1 opt\nnop [1]", [0b101_00001_010_00_010])
54+
4755
def testJmp(self):
4856
self.assertAssemblesTo("l:\njmp l", [0b000_00000_000_00000])
4957
self.assertAssemblesTo("l:\njmp 7", [0b000_00000_000_00111])

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