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Merge pull request #361 from adafruit/update-tinyusb-to-fix-357
update tinyusb to pr hathach/tinyusb#2412
2 parents ac087e4 + 5656196 commit 6de4a11

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14 files changed

+344
-338
lines changed

14 files changed

+344
-338
lines changed

src/arduino/Adafruit_USBD_CDC.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -266,7 +266,7 @@ void tud_cdc_line_state_cb(uint8_t instance, bool dtr, bool rts) {
266266
#else
267267

268268
// Device stack is not enabled (probably in host mode)
269-
#warning "NO_USB selected. No output to Serial will occur!"
269+
#warning "TinyUSB Host selected. No output to Serial will occur!"
270270

271271
uint16_t Adafruit_USBD_CDC::getInterfaceDescriptor(uint8_t itfnum, uint8_t *buf,
272272
uint16_t bufsize) {

src/class/audio/audio_device.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1570,7 +1570,8 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
15701570
{
15711571
uint8_t const *p_desc = _audiod_fct[i].p_desc;
15721572
uint8_t const *p_desc_end = p_desc + _audiod_fct[i].desc_length - TUD_AUDIO_DESC_IAD_LEN;
1573-
while (p_desc < p_desc_end)
1573+
// Condition modified from p_desc < p_desc_end to prevent gcc>=12 strict-overflow warning
1574+
while (p_desc_end - p_desc > 0)
15741575
{
15751576
if (tu_desc_type(p_desc) == TUSB_DESC_ENDPOINT)
15761577
{

src/class/cdc/cdc_host.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -85,6 +85,7 @@ static cdch_interface_t cdch_data[CFG_TUH_CDC];
8585
//--------------------------------------------------------------------+
8686

8787
//------------- ACM prototypes -------------//
88+
static bool acm_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len);
8889
static void acm_process_config(tuh_xfer_t* xfer);
8990

9091
static bool acm_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
@@ -610,8 +611,6 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
610611
// Enumeration
611612
//--------------------------------------------------------------------+
612613

613-
static bool acm_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len);
614-
615614
static bool open_ep_stream_pair(cdch_interface_t* p_cdc, tusb_desc_endpoint_t const *desc_ep)
616615
{
617616
for(size_t i=0; i<2; i++)
@@ -647,7 +646,7 @@ bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_d
647646
return acm_open(daddr, itf_desc, max_len);
648647
}
649648
#if CFG_TUH_CDC_FTDI || CFG_TUH_CDC_CP210X
650-
else if ( 0xff == itf_desc->bInterfaceClass )
649+
else if ( TUSB_CLASS_VENDOR_SPECIFIC == itf_desc->bInterfaceClass )
651650
{
652651
uint16_t vid, pid;
653652
TU_VERIFY(tuh_vid_pid_get(daddr, &vid, &pid));

src/common/tusb_mcu.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -210,6 +210,11 @@
210210

211211
#define TUP_DCD_ENDPOINT_MAX 9
212212

213+
#elif TU_CHECK_MCU(OPT_MCU_STM32H5)
214+
#define TUP_USBIP_FSDEV
215+
#define TUP_USBIP_FSDEV_STM32
216+
#define TUP_DCD_ENDPOINT_MAX 8
217+
213218
#elif TU_CHECK_MCU(OPT_MCU_STM32G4)
214219
// Device controller
215220
#define TUP_USBIP_FSDEV

src/common/tusb_verify.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -75,8 +75,8 @@
7575
#define _MESS_FAILED() do {} while (0)
7676
#endif
7777

78-
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33
79-
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__)
78+
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33. M55
79+
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__)
8080
#define TU_BREAKPOINT() do \
8181
{ \
8282
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \

src/device/dcd.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -152,7 +152,7 @@ void dcd_sof_enable(uint8_t rhport, bool en);
152152

153153
// Invoked when a control transfer's status stage is complete.
154154
// May help DCD to prepare for next control transfer, this API is optional.
155-
void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * request) TU_ATTR_WEAK;
155+
void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * request);
156156

157157
// Configure endpoint's registers according to descriptor
158158
bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_ep);

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