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add tinyusb driver for ch32: usbfs, stm32fsdev, usbhs
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‎src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c

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‎src/portable/st/stm32_fsdev/fsdev_ch32.h

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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2024, hathach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*/
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/** <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*/
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#ifndef TUSB_FSDEV_CH32_H
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#define TUSB_FSDEV_CH32_H
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#include "common/tusb_compiler.h"
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#if CFG_TUSB_MCU == OPT_MCU_CH32V20X
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#include <ch32v20x.h>
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#elif CFG_TUSB_MCU == OPT_MCU_CH32F20X
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#include <ch32f20x.h>
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#endif
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#define FSDEV_PMA_SIZE (512u)
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// volatile 32-bit aligned
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#define _va32 volatile TU_ATTR_ALIGNED(4)
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typedef struct {
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_va32 uint16_t EP0R; // 00: USB Endpoint 0 register
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_va32 uint16_t EP1R; // 04: USB Endpoint 1 register
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_va32 uint16_t EP2R; // 08: USB Endpoint 2 register
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_va32 uint16_t EP3R; // 0C: USB Endpoint 3 register
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_va32 uint16_t EP4R; // 10: USB Endpoint 4 register
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_va32 uint16_t EP5R; // 14: USB Endpoint 5 register
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_va32 uint16_t EP6R; // 18: USB Endpoint 6 register
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_va32 uint16_t EP7R; // 1C: USB Endpoint 7 register
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_va32 uint16_t RESERVED7[16]; // Reserved
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_va32 uint16_t CNTR; // 40: Control register
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_va32 uint16_t ISTR; // 44: Interrupt status register
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_va32 uint16_t FNR; // 48: Frame number register
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_va32 uint16_t DADDR; // 4C: Device address register
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_va32 uint16_t BTABLE; // 50: Buffer Table address register
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} USB_TypeDef;
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TU_VERIFY_STATIC(sizeof(USB_TypeDef) == 0x54, "Size is not correct");
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TU_VERIFY_STATIC(offsetof(USB_TypeDef, CNTR) == 0x40, "Wrong offset");
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#define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers base address */
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#define USB_PMAADDR (APB1PERIPH_BASE + 0x00006000UL) /*!< USB_IP Packet Memory Area base address */
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#define USB ((USB_TypeDef *)USB_BASE)
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/******************************************************************************/
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/* */
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/* USB Device General registers */
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/* */
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/******************************************************************************/
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#define USB_CNTR (USB_BASE + 0x40U) /*!< Control register */
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#define USB_ISTR (USB_BASE + 0x44U) /*!< Interrupt status register */
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#define USB_FNR (USB_BASE + 0x48U) /*!< Frame number register */
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#define USB_DADDR (USB_BASE + 0x4CU) /*!< Device address register */
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#define USB_BTABLE (USB_BASE + 0x50U) /*!< Buffer Table address register */
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/**************************** ISTR interrupt events *************************/
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#define USB_ISTR_CTR ((uint16_t)0x8000U) /*!< Correct TRansfer (clear-only bit) */
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#define USB_ISTR_PMAOVR ((uint16_t)0x4000U) /*!< DMA OVeR/underrun (clear-only bit) */
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#define USB_ISTR_ERR ((uint16_t)0x2000U) /*!< ERRor (clear-only bit) */
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#define USB_ISTR_WKUP ((uint16_t)0x1000U) /*!< WaKe UP (clear-only bit) */
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#define USB_ISTR_SUSP ((uint16_t)0x0800U) /*!< SUSPend (clear-only bit) */
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#define USB_ISTR_RESET ((uint16_t)0x0400U) /*!< RESET (clear-only bit) */
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#define USB_ISTR_SOF ((uint16_t)0x0200U) /*!< Start Of Frame (clear-only bit) */
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#define USB_ISTR_ESOF ((uint16_t)0x0100U) /*!< Expected Start Of Frame (clear-only bit) */
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#define USB_ISTR_DIR ((uint16_t)0x0010U) /*!< DIRection of transaction (read-only bit) */
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#define USB_ISTR_EP_ID ((uint16_t)0x000FU) /*!< EndPoint IDentifier (read-only bit) */
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/* Legacy defines */
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#define USB_ISTR_PMAOVRM USB_ISTR_PMAOVR
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#define USB_CLR_CTR (~USB_ISTR_CTR) /*!< clear Correct TRansfer bit */
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#define USB_CLR_PMAOVR (~USB_ISTR_PMAOVR) /*!< clear DMA OVeR/underrun bit*/
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#define USB_CLR_ERR (~USB_ISTR_ERR) /*!< clear ERRor bit */
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#define USB_CLR_WKUP (~USB_ISTR_WKUP) /*!< clear WaKe UP bit */
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#define USB_CLR_SUSP (~USB_ISTR_SUSP) /*!< clear SUSPend bit */
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#define USB_CLR_RESET (~USB_ISTR_RESET) /*!< clear RESET bit */
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#define USB_CLR_SOF (~USB_ISTR_SOF) /*!< clear Start Of Frame bit */
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#define USB_CLR_ESOF (~USB_ISTR_ESOF) /*!< clear Expected Start Of Frame bit */
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/* Legacy defines */
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#define USB_CLR_PMAOVRM USB_CLR_PMAOVR
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/************************* CNTR control register bits definitions ***********/
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#define USB_CNTR_CTRM ((uint16_t)0x8000U) /*!< Correct TRansfer Mask */
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#define USB_CNTR_PMAOVR ((uint16_t)0x4000U) /*!< DMA OVeR/underrun Mask */
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#define USB_CNTR_ERRM ((uint16_t)0x2000U) /*!< ERRor Mask */
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#define USB_CNTR_WKUPM ((uint16_t)0x1000U) /*!< WaKe UP Mask */
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#define USB_CNTR_SUSPM ((uint16_t)0x0800U) /*!< SUSPend Mask */
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#define USB_CNTR_RESETM ((uint16_t)0x0400U) /*!< RESET Mask */
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#define USB_CNTR_SOFM ((uint16_t)0x0200U) /*!< Start Of Frame Mask */
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#define USB_CNTR_ESOFM ((uint16_t)0x0100U) /*!< Expected Start Of Frame Mask */
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#define USB_CNTR_RESUME ((uint16_t)0x0010U) /*!< RESUME request */
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#define USB_CNTR_FSUSP ((uint16_t)0x0008U) /*!< Force SUSPend */
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#define USB_CNTR_LPMODE ((uint16_t)0x0004U) /*!< Low-power MODE */
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#define USB_CNTR_PDWN ((uint16_t)0x0002U) /*!< Power DoWN */
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#define USB_CNTR_FRES ((uint16_t)0x0001U) /*!< Force USB RESet */
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/* Legacy defines */
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#define USB_CNTR_PMAOVRM USB_CNTR_PMAOVR
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#define USB_CNTR_LP_MODE USB_CNTR_LPMODE
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/******************** FNR Frame Number Register bit definitions ************/
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#define USB_FNR_RXDP ((uint16_t)0x8000U) /*!< status of D+ data line */
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#define USB_FNR_RXDM ((uint16_t)0x4000U) /*!< status of D- data line */
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#define USB_FNR_LCK ((uint16_t)0x2000U) /*!< LoCKed */
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#define USB_FNR_LSOF ((uint16_t)0x1800U) /*!< Lost SOF */
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#define USB_FNR_FN ((uint16_t)0x07FFU) /*!< Frame Number */
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/******************** DADDR Device ADDRess bit definitions ****************/
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#define USB_DADDR_EF ((uint8_t)0x80U) /*!< USB device address Enable Function */
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#define USB_DADDR_ADD ((uint8_t)0x7FU) /*!< USB device address */
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/****************************** Endpoint register *************************/
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#define USB_EP0R USB_BASE /*!< endpoint 0 register address */
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#define USB_EP1R (USB_BASE + 0x04U) /*!< endpoint 1 register address */
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#define USB_EP2R (USB_BASE + 0x08U) /*!< endpoint 2 register address */
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#define USB_EP3R (USB_BASE + 0x0CU) /*!< endpoint 3 register address */
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#define USB_EP4R (USB_BASE + 0x10U) /*!< endpoint 4 register address */
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#define USB_EP5R (USB_BASE + 0x14U) /*!< endpoint 5 register address */
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#define USB_EP6R (USB_BASE + 0x18U) /*!< endpoint 6 register address */
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#define USB_EP7R (USB_BASE + 0x1CU) /*!< endpoint 7 register address */
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/* bit positions */
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#define USB_EP_CTR_RX ((uint16_t)0x8000U) /*!< EndPoint Correct TRansfer RX */
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#define USB_EP_DTOG_RX ((uint16_t)0x4000U) /*!< EndPoint Data TOGGLE RX */
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#define USB_EPRX_STAT ((uint16_t)0x3000U) /*!< EndPoint RX STATus bit field */
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#define USB_EP_SETUP ((uint16_t)0x0800U) /*!< EndPoint SETUP */
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#define USB_EP_T_FIELD ((uint16_t)0x0600U) /*!< EndPoint TYPE */
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#define USB_EP_KIND ((uint16_t)0x0100U) /*!< EndPoint KIND */
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#define USB_EP_CTR_TX ((uint16_t)0x0080U) /*!< EndPoint Correct TRansfer TX */
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#define USB_EP_DTOG_TX ((uint16_t)0x0040U) /*!< EndPoint Data TOGGLE TX */
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#define USB_EPTX_STAT ((uint16_t)0x0030U) /*!< EndPoint TX STATus bit field */
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#define USB_EPADDR_FIELD ((uint16_t)0x000FU) /*!< EndPoint ADDRess FIELD */
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/* EndPoint REGister MASK (no toggle fields) */
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#define USB_EPREG_MASK (USB_EP_CTR_RX|USB_EP_SETUP|USB_EP_T_FIELD|USB_EP_KIND|USB_EP_CTR_TX|USB_EPADDR_FIELD)
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/*!< EP_TYPE[1:0] EndPoint TYPE */
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#define USB_EP_TYPE_MASK ((uint16_t)0x0600U) /*!< EndPoint TYPE Mask */
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#define USB_EP_BULK ((uint16_t)0x0000U) /*!< EndPoint BULK */
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#define USB_EP_CONTROL ((uint16_t)0x0200U) /*!< EndPoint CONTROL */
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#define USB_EP_ISOCHRONOUS ((uint16_t)0x0400U) /*!< EndPoint ISOCHRONOUS */
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#define USB_EP_INTERRUPT ((uint16_t)0x0600U) /*!< EndPoint INTERRUPT */
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#define USB_EP_T_MASK ((uint16_t) ~USB_EP_T_FIELD & USB_EPREG_MASK)
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#define USB_EPKIND_MASK ((uint16_t) ~USB_EP_KIND & USB_EPREG_MASK) /*!< EP_KIND EndPoint KIND */
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/*!< STAT_TX[1:0] STATus for TX transfer */
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#define USB_EP_TX_DIS ((uint16_t)0x0000U) /*!< EndPoint TX DISabled */
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#define USB_EP_TX_STALL ((uint16_t)0x0010U) /*!< EndPoint TX STALLed */
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#define USB_EP_TX_NAK ((uint16_t)0x0020U) /*!< EndPoint TX NAKed */
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#define USB_EP_TX_VALID ((uint16_t)0x0030U) /*!< EndPoint TX VALID */
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#define USB_EPTX_DTOG1 ((uint16_t)0x0010U) /*!< EndPoint TX Data TOGgle bit1 */
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#define USB_EPTX_DTOG2 ((uint16_t)0x0020U) /*!< EndPoint TX Data TOGgle bit2 */
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#define USB_EPTX_DTOGMASK (USB_EPTX_STAT|USB_EPREG_MASK)
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/*!< STAT_RX[1:0] STATus for RX transfer */
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#define USB_EP_RX_DIS ((uint16_t)0x0000U) /*!< EndPoint RX DISabled */
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#define USB_EP_RX_STALL ((uint16_t)0x1000U) /*!< EndPoint RX STALLed */
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#define USB_EP_RX_NAK ((uint16_t)0x2000U) /*!< EndPoint RX NAKed */
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#define USB_EP_RX_VALID ((uint16_t)0x3000U) /*!< EndPoint RX VALID */
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#define USB_EPRX_DTOG1 ((uint16_t)0x1000U) /*!< EndPoint RX Data TOGgle bit1 */
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#define USB_EPRX_DTOG2 ((uint16_t)0x2000U) /*!< EndPoint RX Data TOGgle bit1 */
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#define USB_EPRX_DTOGMASK (USB_EPRX_STAT|USB_EPREG_MASK)
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//--------------------------------------------------------------------+
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//
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//--------------------------------------------------------------------+
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#if CFG_TUSB_MCU == OPT_MCU_CH32V20X
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static const IRQn_Type fsdev_irq[] = {
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USB_HP_CAN1_TX_IRQn,
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USB_LP_CAN1_RX0_IRQn,
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USBWakeUp_IRQn
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};
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enum { FSDEV_IRQ_NUM = TU_ARRAY_SIZE(fsdev_irq) };
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#else
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#error "Unsupported MCU"
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#endif
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void dcd_int_enable(uint8_t rhport) {
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(void)rhport;
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for(uint8_t i=0; i < FSDEV_IRQ_NUM; i++) {
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NVIC_EnableIRQ(fsdev_irq[i]);
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}
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}
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void dcd_int_disable(uint8_t rhport) {
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(void)rhport;
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for(uint8_t i=0; i < FSDEV_IRQ_NUM; i++) {
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NVIC_DisableIRQ(fsdev_irq[i]);
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}
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}
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void dcd_disconnect(uint8_t rhport) {
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(void) rhport;
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EXTEN->EXTEN_CTR &= ~EXTEN_USBD_PU_EN;
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}
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void dcd_connect(uint8_t rhport) {
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(void) rhport;
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EXTEN->EXTEN_CTR |= EXTEN_USBD_PU_EN;
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}
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#endif

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